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Richard Sandifordeb9af292013-05-14 10:17:52 +00001//===-- SystemZDisassembler.cpp - Disassembler for SystemZ ------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "SystemZ.h"
11#include "llvm/MC/MCDisassembler.h"
12#include "llvm/MC/MCFixedLenDisassembler.h"
13#include "llvm/MC/MCInst.h"
14#include "llvm/MC/MCSubtargetInfo.h"
15#include "llvm/Support/MemoryObject.h"
16#include "llvm/Support/TargetRegistry.h"
17
18using namespace llvm;
19
20typedef MCDisassembler::DecodeStatus DecodeStatus;
21
22namespace {
23class SystemZDisassembler : public MCDisassembler {
24public:
Lang Hamesa1bc0f52014-04-15 04:40:56 +000025 SystemZDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
26 : MCDisassembler(STI, Ctx) {}
Richard Sandifordeb9af292013-05-14 10:17:52 +000027 virtual ~SystemZDisassembler() {}
28
29 // Override MCDisassembler.
Richard Sandifordb4d67b52014-03-06 12:03:36 +000030 DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
31 const MemoryObject &region, uint64_t address,
32 raw_ostream &vStream,
33 raw_ostream &cStream) const override;
Richard Sandifordeb9af292013-05-14 10:17:52 +000034};
35} // end anonymous namespace
36
37static MCDisassembler *createSystemZDisassembler(const Target &T,
Lang Hamesa1bc0f52014-04-15 04:40:56 +000038 const MCSubtargetInfo &STI,
39 MCContext &Ctx) {
40 return new SystemZDisassembler(STI, Ctx);
Richard Sandifordeb9af292013-05-14 10:17:52 +000041}
42
43extern "C" void LLVMInitializeSystemZDisassembler() {
44 // Register the disassembler.
45 TargetRegistry::RegisterMCDisassembler(TheSystemZTarget,
46 createSystemZDisassembler);
47}
48
49static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo,
Richard Sandiford09de0912013-11-13 16:57:53 +000050 const unsigned *Regs) {
Richard Sandifordeb9af292013-05-14 10:17:52 +000051 assert(RegNo < 16 && "Invalid register");
Richard Sandiford09de0912013-11-13 16:57:53 +000052 RegNo = Regs[RegNo];
53 if (RegNo == 0)
54 return MCDisassembler::Fail;
Richard Sandifordeb9af292013-05-14 10:17:52 +000055 Inst.addOperand(MCOperand::CreateReg(RegNo));
56 return MCDisassembler::Success;
57}
58
59static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
60 uint64_t Address,
61 const void *Decoder) {
62 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs);
63}
64
Richard Sandifordf9496062013-09-30 10:45:16 +000065static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
66 uint64_t Address,
67 const void *Decoder) {
68 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs);
69}
70
Richard Sandifordeb9af292013-05-14 10:17:52 +000071static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
72 uint64_t Address,
73 const void *Decoder) {
74 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs);
75}
76
77static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo,
78 uint64_t Address,
79 const void *Decoder) {
80 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR128Regs);
81}
82
83static DecodeStatus DecodeADDR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
84 uint64_t Address,
85 const void *Decoder) {
Richard Sandiford09de0912013-11-13 16:57:53 +000086 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs);
Richard Sandifordeb9af292013-05-14 10:17:52 +000087}
88
89static DecodeStatus DecodeFP32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
90 uint64_t Address,
91 const void *Decoder) {
92 return decodeRegisterClass(Inst, RegNo, SystemZMC::FP32Regs);
93}
94
95static DecodeStatus DecodeFP64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
96 uint64_t Address,
97 const void *Decoder) {
98 return decodeRegisterClass(Inst, RegNo, SystemZMC::FP64Regs);
99}
100
101static DecodeStatus DecodeFP128BitRegisterClass(MCInst &Inst, uint64_t RegNo,
102 uint64_t Address,
103 const void *Decoder) {
104 return decodeRegisterClass(Inst, RegNo, SystemZMC::FP128Regs);
105}
106
107template<unsigned N>
108static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) {
109 assert(isUInt<N>(Imm) && "Invalid immediate");
110 Inst.addOperand(MCOperand::CreateImm(Imm));
111 return MCDisassembler::Success;
112}
113
114template<unsigned N>
115static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm) {
116 assert(isUInt<N>(Imm) && "Invalid immediate");
117 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm)));
118 return MCDisassembler::Success;
119}
120
121static DecodeStatus decodeAccessRegOperand(MCInst &Inst, uint64_t Imm,
122 uint64_t Address,
123 const void *Decoder) {
124 return decodeUImmOperand<4>(Inst, Imm);
125}
126
127static DecodeStatus decodeU4ImmOperand(MCInst &Inst, uint64_t Imm,
128 uint64_t Address, const void *Decoder) {
129 return decodeUImmOperand<4>(Inst, Imm);
130}
131
132static DecodeStatus decodeU6ImmOperand(MCInst &Inst, uint64_t Imm,
133 uint64_t Address, const void *Decoder) {
134 return decodeUImmOperand<6>(Inst, Imm);
135}
136
137static DecodeStatus decodeU8ImmOperand(MCInst &Inst, uint64_t Imm,
138 uint64_t Address, const void *Decoder) {
139 return decodeUImmOperand<8>(Inst, Imm);
140}
141
142static DecodeStatus decodeU16ImmOperand(MCInst &Inst, uint64_t Imm,
143 uint64_t Address, const void *Decoder) {
144 return decodeUImmOperand<16>(Inst, Imm);
145}
146
147static DecodeStatus decodeU32ImmOperand(MCInst &Inst, uint64_t Imm,
148 uint64_t Address, const void *Decoder) {
149 return decodeUImmOperand<32>(Inst, Imm);
150}
151
152static DecodeStatus decodeS8ImmOperand(MCInst &Inst, uint64_t Imm,
153 uint64_t Address, const void *Decoder) {
154 return decodeSImmOperand<8>(Inst, Imm);
155}
156
157static DecodeStatus decodeS16ImmOperand(MCInst &Inst, uint64_t Imm,
158 uint64_t Address, const void *Decoder) {
159 return decodeSImmOperand<16>(Inst, Imm);
160}
161
162static DecodeStatus decodeS32ImmOperand(MCInst &Inst, uint64_t Imm,
163 uint64_t Address, const void *Decoder) {
164 return decodeSImmOperand<32>(Inst, Imm);
165}
166
167template<unsigned N>
168static DecodeStatus decodePCDBLOperand(MCInst &Inst, uint64_t Imm,
169 uint64_t Address) {
170 assert(isUInt<N>(Imm) && "Invalid PC-relative offset");
171 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address));
172 return MCDisassembler::Success;
173}
174
175static DecodeStatus decodePC16DBLOperand(MCInst &Inst, uint64_t Imm,
176 uint64_t Address,
177 const void *Decoder) {
178 return decodePCDBLOperand<16>(Inst, Imm, Address);
179}
180
181static DecodeStatus decodePC32DBLOperand(MCInst &Inst, uint64_t Imm,
182 uint64_t Address,
183 const void *Decoder) {
184 return decodePCDBLOperand<32>(Inst, Imm, Address);
185}
186
187static DecodeStatus decodeBDAddr12Operand(MCInst &Inst, uint64_t Field,
188 const unsigned *Regs) {
189 uint64_t Base = Field >> 12;
190 uint64_t Disp = Field & 0xfff;
191 assert(Base < 16 && "Invalid BDAddr12");
192 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
193 Inst.addOperand(MCOperand::CreateImm(Disp));
194 return MCDisassembler::Success;
195}
196
197static DecodeStatus decodeBDAddr20Operand(MCInst &Inst, uint64_t Field,
198 const unsigned *Regs) {
199 uint64_t Base = Field >> 20;
200 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff);
201 assert(Base < 16 && "Invalid BDAddr20");
202 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
203 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
204 return MCDisassembler::Success;
205}
206
207static DecodeStatus decodeBDXAddr12Operand(MCInst &Inst, uint64_t Field,
208 const unsigned *Regs) {
209 uint64_t Index = Field >> 16;
210 uint64_t Base = (Field >> 12) & 0xf;
211 uint64_t Disp = Field & 0xfff;
212 assert(Index < 16 && "Invalid BDXAddr12");
213 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
214 Inst.addOperand(MCOperand::CreateImm(Disp));
215 Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
216 return MCDisassembler::Success;
217}
218
219static DecodeStatus decodeBDXAddr20Operand(MCInst &Inst, uint64_t Field,
220 const unsigned *Regs) {
221 uint64_t Index = Field >> 24;
222 uint64_t Base = (Field >> 20) & 0xf;
223 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12);
224 assert(Index < 16 && "Invalid BDXAddr20");
225 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
226 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
227 Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
228 return MCDisassembler::Success;
229}
230
Richard Sandiford1d959002013-07-02 14:56:45 +0000231static DecodeStatus decodeBDLAddr12Len8Operand(MCInst &Inst, uint64_t Field,
232 const unsigned *Regs) {
233 uint64_t Length = Field >> 16;
234 uint64_t Base = (Field >> 12) & 0xf;
235 uint64_t Disp = Field & 0xfff;
236 assert(Length < 256 && "Invalid BDLAddr12Len8");
237 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
238 Inst.addOperand(MCOperand::CreateImm(Disp));
239 Inst.addOperand(MCOperand::CreateImm(Length + 1));
240 return MCDisassembler::Success;
241}
242
Richard Sandifordeb9af292013-05-14 10:17:52 +0000243static DecodeStatus decodeBDAddr32Disp12Operand(MCInst &Inst, uint64_t Field,
244 uint64_t Address,
245 const void *Decoder) {
246 return decodeBDAddr12Operand(Inst, Field, SystemZMC::GR32Regs);
247}
248
249static DecodeStatus decodeBDAddr32Disp20Operand(MCInst &Inst, uint64_t Field,
250 uint64_t Address,
251 const void *Decoder) {
252 return decodeBDAddr20Operand(Inst, Field, SystemZMC::GR32Regs);
253}
254
255static DecodeStatus decodeBDAddr64Disp12Operand(MCInst &Inst, uint64_t Field,
256 uint64_t Address,
257 const void *Decoder) {
258 return decodeBDAddr12Operand(Inst, Field, SystemZMC::GR64Regs);
259}
260
261static DecodeStatus decodeBDAddr64Disp20Operand(MCInst &Inst, uint64_t Field,
262 uint64_t Address,
263 const void *Decoder) {
264 return decodeBDAddr20Operand(Inst, Field, SystemZMC::GR64Regs);
265}
266
267static DecodeStatus decodeBDXAddr64Disp12Operand(MCInst &Inst, uint64_t Field,
268 uint64_t Address,
269 const void *Decoder) {
270 return decodeBDXAddr12Operand(Inst, Field, SystemZMC::GR64Regs);
271}
272
273static DecodeStatus decodeBDXAddr64Disp20Operand(MCInst &Inst, uint64_t Field,
274 uint64_t Address,
275 const void *Decoder) {
276 return decodeBDXAddr20Operand(Inst, Field, SystemZMC::GR64Regs);
277}
278
Richard Sandiford1d959002013-07-02 14:56:45 +0000279static DecodeStatus decodeBDLAddr64Disp12Len8Operand(MCInst &Inst,
280 uint64_t Field,
281 uint64_t Address,
282 const void *Decoder) {
283 return decodeBDLAddr12Len8Operand(Inst, Field, SystemZMC::GR64Regs);
284}
285
Richard Sandifordeb9af292013-05-14 10:17:52 +0000286#include "SystemZGenDisassemblerTables.inc"
287
288DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
289 const MemoryObject &Region,
290 uint64_t Address,
291 raw_ostream &os,
292 raw_ostream &cs) const {
293 // Get the first two bytes of the instruction.
294 uint8_t Bytes[6];
295 Size = 0;
Benjamin Kramer534d3a42013-05-24 10:54:58 +0000296 if (Region.readBytes(Address, 2, Bytes) == -1)
Richard Sandifordeb9af292013-05-14 10:17:52 +0000297 return MCDisassembler::Fail;
298
299 // The top 2 bits of the first byte specify the size.
300 const uint8_t *Table;
301 if (Bytes[0] < 0x40) {
302 Size = 2;
303 Table = DecoderTable16;
304 } else if (Bytes[0] < 0xc0) {
305 Size = 4;
306 Table = DecoderTable32;
307 } else {
308 Size = 6;
309 Table = DecoderTable48;
310 }
311
312 // Read any remaining bytes.
Benjamin Kramer534d3a42013-05-24 10:54:58 +0000313 if (Size > 2 && Region.readBytes(Address + 2, Size - 2, Bytes + 2) == -1)
Richard Sandifordeb9af292013-05-14 10:17:52 +0000314 return MCDisassembler::Fail;
315
316 // Construct the instruction.
317 uint64_t Inst = 0;
318 for (uint64_t I = 0; I < Size; ++I)
319 Inst = (Inst << 8) | Bytes[I];
320
321 return decodeInstruction(Table, MI, Inst, Address, this, STI);
322}