blob: c02b4e197e7ae4ca2e6a101ef5154129c98254dd [file] [log] [blame]
Adrian Prantlb16d9eb2015-01-12 22:19:22 +00001//===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains support for writing dwarf compile unit.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
16
17#include "llvm/Support/DataTypes.h"
18
19namespace llvm {
20
Adrian Prantla4c30d62015-01-12 23:36:56 +000021class AsmPrinter;
22class TargetRegisterInfo;
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000023
24/// Base class containing the logic for constructing DWARF expressions
25/// independently of whether they are emitted into a DIE or into a .debug_loc
26/// entry.
27class DwarfExpression {
Adrian Prantl00dbc2a2015-01-12 22:19:26 +000028protected:
Adrian Prantla4c30d62015-01-12 23:36:56 +000029 const AsmPrinter ≈
30 // Various convenience accessors that extract things out of AsmPrinter.
31 const TargetRegisterInfo *getTRI() const;
32
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000033public:
Adrian Prantla4c30d62015-01-12 23:36:56 +000034 DwarfExpression(const AsmPrinter &AP) : AP(AP) {}
Adrian Prantl9cffbd82015-01-12 23:36:50 +000035 virtual ~DwarfExpression() {}
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000036
37 virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
38 virtual void EmitSigned(int Value) = 0;
39 virtual void EmitUnsigned(unsigned Value) = 0;
Adrian Prantl00dbc2a2015-01-12 22:19:26 +000040
41 virtual unsigned getFrameRegister() = 0;
42
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000043 /// Emit a dwarf register operation.
44 void AddReg(int DwarfReg, const char* Comment = nullptr);
45 /// Emit an (double-)indirect dwarf register operation.
46 void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
47
48 /// Emit a dwarf register operation for describing
49 /// - a small value occupying only part of a register or
50 /// - a register representing only part of a value.
51 void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
52 /// Emit a shift-right dwarf expression.
53 void AddShr(unsigned ShiftBy);
54
Adrian Prantl00dbc2a2015-01-12 22:19:26 +000055 /// Emit an indirect dwarf register operation for the given machine register.
56 /// Returns false if no DWARF register exists for MachineReg.
57 bool AddMachineRegIndirect(unsigned MachineReg, int Offset);
58
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000059 /// \brief Emit a partial DWARF register operation.
60 /// \param MLoc the register
61 /// \param PieceSize size and
62 /// \param PieceOffset offset of the piece in bits, if this is one
63 /// piece of an aggregate value.
64 ///
65 /// If size and offset is zero an operation for the entire
66 /// register is emitted: Some targets do not provide a DWARF
67 /// register number for every register. If this is the case, this
68 /// function will attempt to emit a DWARF register by emitting a
69 /// piece of a super-register or by piecing together multiple
70 /// subregisters that alias the register.
71 void AddMachineRegPiece(unsigned MachineReg,
72 unsigned PieceSizeInBits = 0,
73 unsigned PieceOffsetInBits = 0);
74};
75
76}
77
78#endif