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gerrit-public.fairphone.software / toolchain / llvm-project / a5baf86744296f2e8769557e2c41d64d07791766 / . / llvm / test / tools / llvm-mca / X86 / scheduler-queue-usage.s
blob: a1854a2821919daca031861f1a71fee6d3d68222 [file] [log] [blame]
Roman Lebedev7c423002018-06-15 14:01:35 +0000[diff] [blame]1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
Roman Lebedeva5baf862018-10-27 20:46:30 +0000[diff] [blame^]2# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BDVER2 %s
Roman Lebedev7c423002018-06-15 14:01:35 +0000[diff] [blame]3# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BTVER2 %s
4# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,ZNVER1 %s
5# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,SNB %s
6# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,IVB %s
7# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,HSW %s
8# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,BDW %s
9# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=knl -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,KNL %s
10# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,SKX %s
11# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,SKX-AVX512 %s
12# RUN: llvm-mca %s -mtriple=x86_64-unknown-unknown -mcpu=slm -iterations=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,SLM %s
13
14xor %eax, %ebx
15
Roman Lebedev7c423002018-06-15 14:01:35 +0000[diff] [blame]16# ALL: Schedulers - number of cycles where we saw N instructions issued:
17# ALL-NEXT: [# issued], [# cycles]
18# ALL-NEXT: 0, 3 (75.0%)
19# ALL-NEXT: 1, 1 (25.0%)
20
Roman Lebedeva5192182018-10-27 20:36:11 +0000[diff] [blame]21# BDVER2: Scheduler's queue usage:
22# BDVER2-NEXT: [1] Resource name.
23# BDVER2-NEXT: [2] Average number of used buffer entries.
24# BDVER2-NEXT: [3] Maximum number of used buffer entries.
25# BDVER2-NEXT: [4] Total number of buffer entries.
26
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]27# BDW: Scheduler's queue usage:
28# BDW-NEXT: [1] Resource name.
29# BDW-NEXT: [2] Average number of used buffer entries.
30# BDW-NEXT: [3] Maximum number of used buffer entries.
31# BDW-NEXT: [4] Total number of buffer entries.
Roman Lebedev7c423002018-06-15 14:01:35 +0000[diff] [blame]32
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]33# BTVER2: Scheduler's queue usage:
34# BTVER2-NEXT: [1] Resource name.
35# BTVER2-NEXT: [2] Average number of used buffer entries.
36# BTVER2-NEXT: [3] Maximum number of used buffer entries.
37# BTVER2-NEXT: [4] Total number of buffer entries.
38
39# HSW: Scheduler's queue usage:
40# HSW-NEXT: [1] Resource name.
41# HSW-NEXT: [2] Average number of used buffer entries.
42# HSW-NEXT: [3] Maximum number of used buffer entries.
43# HSW-NEXT: [4] Total number of buffer entries.
44
45# IVB: Scheduler's queue usage:
46# IVB-NEXT: [1] Resource name.
47# IVB-NEXT: [2] Average number of used buffer entries.
48# IVB-NEXT: [3] Maximum number of used buffer entries.
49# IVB-NEXT: [4] Total number of buffer entries.
50
51# KNL: Scheduler's queue usage:
52# KNL-NEXT: [1] Resource name.
53# KNL-NEXT: [2] Average number of used buffer entries.
54# KNL-NEXT: [3] Maximum number of used buffer entries.
55# KNL-NEXT: [4] Total number of buffer entries.
Roman Lebedev7c423002018-06-15 14:01:35 +0000[diff] [blame]56
57# SKX: Scheduler's queue usage:
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]58# SKX-NEXT: [1] Resource name.
59# SKX-NEXT: [2] Average number of used buffer entries.
60# SKX-NEXT: [3] Maximum number of used buffer entries.
61# SKX-NEXT: [4] Total number of buffer entries.
Roman Lebedev7c423002018-06-15 14:01:35 +0000[diff] [blame]62
63# SKX-AVX512: Scheduler's queue usage:
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]64# SKX-AVX512-NEXT: [1] Resource name.
65# SKX-AVX512-NEXT: [2] Average number of used buffer entries.
66# SKX-AVX512-NEXT: [3] Maximum number of used buffer entries.
67# SKX-AVX512-NEXT: [4] Total number of buffer entries.
68
Greg Bedwelldee7bfd2018-10-04 14:42:19 +0000[diff] [blame]69# SLM: Scheduler's queue usage:
70# SLM-NEXT: No scheduler resources used.
71
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]72# SNB: Scheduler's queue usage:
73# SNB-NEXT: [1] Resource name.
74# SNB-NEXT: [2] Average number of used buffer entries.
75# SNB-NEXT: [3] Maximum number of used buffer entries.
76# SNB-NEXT: [4] Total number of buffer entries.
Roman Lebedev7c423002018-06-15 14:01:35 +0000[diff] [blame]77
78# ZNVER1: Scheduler's queue usage:
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]79# ZNVER1-NEXT: [1] Resource name.
80# ZNVER1-NEXT: [2] Average number of used buffer entries.
81# ZNVER1-NEXT: [3] Maximum number of used buffer entries.
82# ZNVER1-NEXT: [4] Total number of buffer entries.
83
Roman Lebedeva5192182018-10-27 20:36:11 +0000[diff] [blame]84# BDVER2: [1] [2] [3] [4]
Roman Lebedeva5baf862018-10-27 20:46:30 +0000[diff] [blame^]85# BDVER2-NEXT: PdEX 0 1 40
86# BDVER2-NEXT: PdFPU 0 0 64
87# BDVER2-NEXT: PdLoad 0 0 40
88# BDVER2-NEXT: PdStore 0 0 24
Roman Lebedeva5192182018-10-27 20:36:11 +0000[diff] [blame]89
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]90# BDW: [1] [2] [3] [4]
91# BDW-NEXT: BWPortAny 0 1 60
92
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]93# BTVER2: [1] [2] [3] [4]
94# BTVER2-NEXT: JALU01 0 1 20
95# BTVER2-NEXT: JFPU01 0 0 18
96# BTVER2-NEXT: JLSAGU 0 0 12
97
Greg Bedwelldee7bfd2018-10-04 14:42:19 +0000[diff] [blame]98# HSW: [1] [2] [3] [4]
99# HSW-NEXT: HWPortAny 0 1 60
100
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]101# IVB: [1] [2] [3] [4]
102# IVB-NEXT: SBPortAny 0 1 54
103
Greg Bedwelldee7bfd2018-10-04 14:42:19 +0000[diff] [blame]104# KNL: [1] [2] [3] [4]
105# KNL-NEXT: HWPortAny 0 1 60
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]106
107# SKX: [1] [2] [3] [4]
108# SKX-NEXT: SKLPortAny 0 1 60
109
110# SKX-AVX512: [1] [2] [3] [4]
111# SKX-AVX512-NEXT: SKXPortAny 0 1 60
112
Greg Bedwelldee7bfd2018-10-04 14:42:19 +0000[diff] [blame]113# SNB: [1] [2] [3] [4]
114# SNB-NEXT: SBPortAny 0 1 54
115
Andrea Di Biagiob89b96c2018-08-27 14:52:52 +0000[diff] [blame]116# ZNVER1: [1] [2] [3] [4]
117# ZNVER1-NEXT: ZnAGU 0 0 28
118# ZNVER1-NEXT: ZnALU 0 1 56
119# ZNVER1-NEXT: ZnFPU 0 0 36