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Sanjay Patel82bc8422018-06-12 22:50:37 +00001; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Chad Rosier84a238d2017-05-04 14:14:44 +00002; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs | FileCheck %s
3
Sanjay Patel82bc8422018-06-12 22:50:37 +00004define double @test1(double %a, double %b) {
Chad Rosier84a238d2017-05-04 14:14:44 +00005; CHECK-LABEL: test1:
Sanjay Patel82bc8422018-06-12 22:50:37 +00006; CHECK: // %bb.0:
7; CHECK-NEXT: fadd d1, d1, d1
8; CHECK-NEXT: fsub d0, d0, d1
9; CHECK-NEXT: ret
Chad Rosier84a238d2017-05-04 14:14:44 +000010 %mul = fmul double %b, -2.000000e+00
11 %add1 = fadd double %a, %mul
12 ret double %add1
13}
14
15; DAGCombine will canonicalize 'a - 2.0*b' to 'a + -2.0*b'
Sanjay Patel82bc8422018-06-12 22:50:37 +000016
17define double @test2(double %a, double %b) {
Chad Rosier84a238d2017-05-04 14:14:44 +000018; CHECK-LABEL: test2:
Sanjay Patel82bc8422018-06-12 22:50:37 +000019; CHECK: // %bb.0:
20; CHECK-NEXT: fadd d1, d1, d1
21; CHECK-NEXT: fsub d0, d0, d1
22; CHECK-NEXT: ret
Chad Rosier84a238d2017-05-04 14:14:44 +000023 %mul = fmul double %b, 2.000000e+00
24 %add1 = fsub double %a, %mul
25 ret double %add1
26}
27
Sanjay Patel82bc8422018-06-12 22:50:37 +000028define double @test3(double %a, double %b, double %c) {
Chad Rosier84a238d2017-05-04 14:14:44 +000029; CHECK-LABEL: test3:
Sanjay Patel82bc8422018-06-12 22:50:37 +000030; CHECK: // %bb.0:
31; CHECK-NEXT: fmul d0, d0, d1
32; CHECK-NEXT: fadd d1, d2, d2
33; CHECK-NEXT: fsub d0, d0, d1
34; CHECK-NEXT: ret
Chad Rosier84a238d2017-05-04 14:14:44 +000035 %mul = fmul double %a, %b
36 %mul1 = fmul double %c, 2.000000e+00
37 %sub = fsub double %mul, %mul1
38 ret double %sub
39}
40
Sanjay Patel82bc8422018-06-12 22:50:37 +000041define double @test4(double %a, double %b, double %c) {
Chad Rosier84a238d2017-05-04 14:14:44 +000042; CHECK-LABEL: test4:
Sanjay Patel82bc8422018-06-12 22:50:37 +000043; CHECK: // %bb.0:
44; CHECK-NEXT: fmul d0, d0, d1
45; CHECK-NEXT: fadd d1, d2, d2
46; CHECK-NEXT: fsub d0, d0, d1
47; CHECK-NEXT: ret
Chad Rosier84a238d2017-05-04 14:14:44 +000048 %mul = fmul double %a, %b
49 %mul1 = fmul double %c, -2.000000e+00
50 %add2 = fadd double %mul, %mul1
51 ret double %add2
52}
53
Sanjay Patel7cf57332018-10-15 16:44:00 +000054define <4 x float> @fmulnegtwo_vec(<4 x float> %a, <4 x float> %b) {
55; CHECK-LABEL: fmulnegtwo_vec:
Sanjay Patel82bc8422018-06-12 22:50:37 +000056; CHECK: // %bb.0:
57; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
58; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
59; CHECK-NEXT: ret
Chad Rosier84a238d2017-05-04 14:14:44 +000060 %mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
61 %add = fadd <4 x float> %a, %mul
62 ret <4 x float> %add
63}
64
Sanjay Patel7cf57332018-10-15 16:44:00 +000065define <4 x float> @fmulnegtwo_vec_commute(<4 x float> %a, <4 x float> %b) {
66; CHECK-LABEL: fmulnegtwo_vec_commute:
67; CHECK: // %bb.0:
68; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
69; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
70; CHECK-NEXT: ret
71 %mul = fmul <4 x float> %b, <float -2.0, float -2.0, float -2.0, float -2.0>
72 %add = fadd <4 x float> %mul, %a
73 ret <4 x float> %add
74}
75
76define <4 x float> @fmulnegtwo_vec_undefs(<4 x float> %a, <4 x float> %b) {
77; CHECK-LABEL: fmulnegtwo_vec_undefs:
78; CHECK: // %bb.0:
Sanjay Patel8bd74782018-10-15 16:54:07 +000079; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
80; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
Sanjay Patel7cf57332018-10-15 16:44:00 +000081; CHECK-NEXT: ret
82 %mul = fmul <4 x float> %b, <float undef, float -2.0, float undef, float -2.0>
83 %add = fadd <4 x float> %a, %mul
84 ret <4 x float> %add
85}
86
87define <4 x float> @fmulnegtwo_vec_commute_undefs(<4 x float> %a, <4 x float> %b) {
88; CHECK-LABEL: fmulnegtwo_vec_commute_undefs:
89; CHECK: // %bb.0:
Sanjay Patel8bd74782018-10-15 16:54:07 +000090; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
91; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
Sanjay Patel7cf57332018-10-15 16:44:00 +000092; CHECK-NEXT: ret
93 %mul = fmul <4 x float> %b, <float -2.0, float undef, float -2.0, float -2.0>
94 %add = fadd <4 x float> %mul, %a
95 ret <4 x float> %add
96}
97
Chad Rosier84a238d2017-05-04 14:14:44 +000098define <4 x float> @test6(<4 x float> %a, <4 x float> %b) {
Sanjay Patel82bc8422018-06-12 22:50:37 +000099; CHECK-LABEL: test6:
100; CHECK: // %bb.0:
101; CHECK-NEXT: fadd v1.4s, v1.4s, v1.4s
102; CHECK-NEXT: fsub v0.4s, v0.4s, v1.4s
103; CHECK-NEXT: ret
Chad Rosier84a238d2017-05-04 14:14:44 +0000104 %mul = fmul <4 x float> %b, <float 2.0, float 2.0, float 2.0, float 2.0>
105 %add = fsub <4 x float> %a, %mul
106 ret <4 x float> %add
107}
108
109; Don't fold (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B)) if the fmul has
110; multiple uses.
Sanjay Patel82bc8422018-06-12 22:50:37 +0000111
112define double @test7(double %a, double %b) nounwind {
Chad Rosier84a238d2017-05-04 14:14:44 +0000113; CHECK-LABEL: test7:
Sanjay Patel82bc8422018-06-12 22:50:37 +0000114; CHECK: // %bb.0:
115; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill
116; CHECK-NEXT: fmov d2, #-2.00000000
117; CHECK-NEXT: fmul d1, d1, d2
118; CHECK-NEXT: fadd d8, d0, d1
119; CHECK-NEXT: mov v0.16b, v1.16b
120; CHECK-NEXT: str x30, [sp, #8] // 8-byte Folded Spill
121; CHECK-NEXT: bl use
122; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Folded Reload
123; CHECK-NEXT: mov v0.16b, v8.16b
124; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload
125; CHECK-NEXT: ret
Chad Rosier84a238d2017-05-04 14:14:44 +0000126 %mul = fmul double %b, -2.000000e+00
127 %add1 = fadd double %a, %mul
128 call void @use(double %mul)
129 ret double %add1
130}
131
Sanjay Patel82bc8422018-06-12 22:50:37 +0000132define float @fadd_const_multiuse_fmf(float %x) {
133; CHECK-LABEL: fadd_const_multiuse_fmf:
134; CHECK: // %bb.0:
Adhemerval Zanellab3ccc552019-02-01 12:26:06 +0000135; CHECK-DAG: mov [[W59:w[0-9]+]], #1114374144
136; CHECK-DAG: mov [[W42:w[0-9]+]], #1109917696
137; CHECK-DAG: fmov [[FP59:s[0-9]+]], [[W59]]
138; CHECK-DAG: fmov [[FP42:s[0-9]+]], [[W42]]
139; CHECK-NEXT: fadd [[TMP1:s[0-9]+]], s0, [[FP42]]
140; CHECK-NEXT: fadd [[TMP2:s[0-9]+]], s0, [[FP59]]
141; CHECK-NEXT: fadd s0, [[TMP1]], [[TMP2]]
Sanjay Patel82bc8422018-06-12 22:50:37 +0000142; CHECK-NEXT: ret
143 %a1 = fadd float %x, 42.0
144 %a2 = fadd nsz reassoc float %a1, 17.0
145 %a3 = fadd float %a1, %a2
146 ret float %a3
147}
148
Michael Berg005d7052019-07-31 21:57:28 +0000149; DAGCombiner transforms this into: (x + 17.0) + (x + 59.0).
150define float @fadd_const_multiuse_attr(float %x) {
Sanjay Patel82bc8422018-06-12 22:50:37 +0000151; CHECK-LABEL: fadd_const_multiuse_attr:
152; CHECK: // %bb.0:
Adhemerval Zanellab3ccc552019-02-01 12:26:06 +0000153; CHECK-DAG: mov [[W17:w[0-9]+]], #1109917696
Michael Berg005d7052019-07-31 21:57:28 +0000154; CHECK-DAG: mov [[W59:w[0-9]+]], #1114374144
Adhemerval Zanellab3ccc552019-02-01 12:26:06 +0000155; CHECK-NEXT: fmov [[FP17:s[0-9]+]], [[W17]]
Michael Berg005d7052019-07-31 21:57:28 +0000156; CHECK-NEXT: fmov [[FP59:s[0-9]+]], [[W59]]
157; CHECK-NEXT: fadd [[TMP1:s[0-9]+]], s0, [[FP17]]
158; CHECK-NEXT: fadd [[TMP2:s[0-9]+]], s0, [[FP59]]
159; CHECK-NEXT: fadd s0, [[TMP1]], [[TMP2]]
Sanjay Patel82bc8422018-06-12 22:50:37 +0000160; CHECK-NEXT: ret
Michael Berg005d7052019-07-31 21:57:28 +0000161 %a1 = fadd fast float %x, 42.0
162 %a2 = fadd fast float %a1, 17.0
163 %a3 = fadd fast float %a1, %a2
Sanjay Patel82bc8422018-06-12 22:50:37 +0000164 ret float %a3
165}
166
Sanjay Patel69ab7a02019-08-09 14:52:31 +0000167; PR32939 - https://bugs.llvm.org/show_bug.cgi?id=32939
168
169define double @fmul2_negated(double %a, double %b, double %c) {
170; CHECK-LABEL: fmul2_negated:
171; CHECK: // %bb.0:
Sanjay Patel26b2c112019-08-09 21:37:32 +0000172; CHECK-NEXT: fadd d1, d1, d1
Sanjay Patel69ab7a02019-08-09 14:52:31 +0000173; CHECK-NEXT: fmul d1, d1, d2
Sanjay Patel26b2c112019-08-09 21:37:32 +0000174; CHECK-NEXT: fsub d0, d0, d1
Sanjay Patel69ab7a02019-08-09 14:52:31 +0000175; CHECK-NEXT: ret
176 %mul = fmul double %b, 2.0
177 %mul1 = fmul double %mul, %c
178 %sub = fsub double %a, %mul1
179 ret double %sub
180}
181
182define <2 x double> @fmul2_negated_vec(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
183; CHECK-LABEL: fmul2_negated_vec:
184; CHECK: // %bb.0:
Sanjay Patel26b2c112019-08-09 21:37:32 +0000185; CHECK-NEXT: fadd v1.2d, v1.2d, v1.2d
Sanjay Patel69ab7a02019-08-09 14:52:31 +0000186; CHECK-NEXT: fmul v1.2d, v1.2d, v2.2d
Sanjay Patel26b2c112019-08-09 21:37:32 +0000187; CHECK-NEXT: fsub v0.2d, v0.2d, v1.2d
Sanjay Patel69ab7a02019-08-09 14:52:31 +0000188; CHECK-NEXT: ret
189 %mul = fmul <2 x double> %b, <double 2.0, double 2.0>
190 %mul1 = fmul <2 x double> %mul, %c
191 %sub = fsub <2 x double> %a, %mul1
192 ret <2 x double> %sub
193}
194
Chad Rosier84a238d2017-05-04 14:14:44 +0000195declare void @use(double)
Sanjay Patel82bc8422018-06-12 22:50:37 +0000196