| Tim Northover | 644a819 | 2018-06-20 12:09:44 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=thumbv6m-apple-macho %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T1 |
| 2 | ; RUN: llc -mtriple=thumbv7m-apple-macho %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T2 |
| 3 | |
| 4 | define i32 @test_add_i3(i1 %tst, i32 %a, i32 %b) { |
| 5 | ; CHECK-LABEL: test_add_i3: |
| 6 | ; CHECK: adds r0, {{r[0-9]+}}, #2 |
| 7 | %tmp = and i32 %a, -7 |
| 8 | %tmp1 = and i32 %b, -4 |
| 9 | %int = select i1 %tst, i32 %tmp, i32 %tmp1 |
| 10 | |
| 11 | ; Call to force %int into a register that isn't r0 so using the i3 form is a |
| 12 | ; good idea. |
| 13 | call void @foo(i32 %int) |
| 14 | %res = or i32 %int, 2 |
| 15 | ret i32 %res |
| 16 | } |
| 17 | |
| 18 | define i32 @test_add_i8(i32 %a, i32 %b, i1 %tst) { |
| 19 | ; CHECK-LABEL: test_add_i8: |
| 20 | ; CHECK-T1: adds r0, #12 |
| 21 | ; CHECK-T2: add.w r0, {{r[0-9]+}}, #12 |
| 22 | |
| 23 | %tmp = and i32 %a, -256 |
| 24 | %tmp1 = and i32 %b, -512 |
| 25 | %int = select i1 %tst, i32 %tmp, i32 %tmp1 |
| 26 | %res = or i32 %int, 12 |
| 27 | ret i32 %res |
| 28 | } |
| 29 | |
| 30 | define i32 @test_add_i12(i32 %a, i32 %b, i1 %tst) { |
| 31 | ; CHECK-LABEL: test_add_i12: |
| 32 | ; CHECK-T2: addw r0, {{r[0-9]+}}, #854 |
| 33 | |
| 34 | %tmp = and i32 %a, -4096 |
| 35 | %tmp1 = and i32 %b, -8192 |
| 36 | %int = select i1 %tst, i32 %tmp, i32 %tmp1 |
| 37 | %res = or i32 %int, 854 |
| 38 | ret i32 %res |
| 39 | } |
| 40 | |
| 41 | declare void @foo(i32) |