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gerrit-public.fairphone.software / toolchain / llvm-project / a69bbe02a2352271e8b14542073f177e24c499c1 / . / llvm / test / CodeGen / Mips / longbranch / branch-limits-int-mips64r6.mir
blob: 9df57064b634e35389eb22fb348077fc26b3372d [file] [log] [blame]
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
Aleksandar Beserminjia5f75512018-05-22 13:24:38 +0000[diff] [blame]2# RUN: llc -mtriple=mips64-mti-linux-gnu %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MIPS64
3# RUN: llc -mtriple=mips64-mti-linux-gnu %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]4
5# Test the long branch expansion of various branches
6
7--- |
8 define i64 @expand_BNEZC64(i64 %a, i64 %b) {
9 %cmp = icmp eq i64 %a, %b
10 br i1 %cmp, label %iftrue, label %tail
11
12 iftrue:
13 call void asm sideeffect ".space 831068", ""()
14 ret i64 1
15
16 tail:
17 ret i64 0
18 }
19
20 define i64 @expand_BEQZC64(i64 %a, i64 %b) {
21 %cmp = icmp eq i64 %a, %b
22 br i1 %cmp, label %iftrue, label %tail
23
24 iftrue:
25 call void asm sideeffect ".space 831068", ""()
26 ret i64 1
27
28 tail:
29 ret i64 0
30 }
31
32 define i64 @expand_BNEC64(i64 %a, i64 %b) {
33 %cmp = icmp eq i64 %a, %b
34 br i1 %cmp, label %iftrue, label %tail
35
36 iftrue:
37 call void asm sideeffect ".space 831068", ""()
38 ret i64 1
39
40 tail:
41 ret i64 0
42 }
43
44 define i64 @expand_BEQC64(i64 %a, i64 %b) {
45 %cmp = icmp eq i64 %a, %b
46 br i1 %cmp, label %iftrue, label %tail
47
48 iftrue:
49 call void asm sideeffect ".space 831068", ""()
50 ret i64 1
51
52 tail:
53 ret i64 0
54 }
55
56 define i64 @expand_BLTC64(i64 %a, i64 %b) {
57 %cmp = icmp eq i64 %a, %b
58 br i1 %cmp, label %iftrue, label %tail
59
60 iftrue:
61 call void asm sideeffect ".space 831068", ""()
62 ret i64 1
63
64 tail:
65 ret i64 0
66 }
67
68 define i64 @expand_BLTUC64(i64 %a, i64 %b) {
69 %cmp = icmp eq i64 %a, %b
70 br i1 %cmp, label %iftrue, label %tail
71
72 iftrue:
73 call void asm sideeffect ".space 831068", ""()
74 ret i64 1
75
76 tail:
77 ret i64 0
78 }
79
80 define i64 @expand_BGEC64(i64 %a, i64 %b) {
81 %cmp = icmp eq i64 %a, %b
82 br i1 %cmp, label %iftrue, label %tail
83
84 iftrue:
85 call void asm sideeffect ".space 831068", ""()
86 ret i64 1
87
88 tail:
89 ret i64 0
90 }
91
92 define i64 @expand_BGEUC64(i64 %a, i64 %b) {
93 %cmp = icmp eq i64 %a, %b
94 br i1 %cmp, label %iftrue, label %tail
95
96 iftrue:
97 call void asm sideeffect ".space 831068", ""()
98 ret i64 1
99
100 tail:
101 ret i64 0
102 }
103
104 define i64 @expand_BLEZC64(i64 %a, i64 %b) {
105 %cmp = icmp eq i64 %a, %b
106 br i1 %cmp, label %iftrue, label %tail
107
108 iftrue:
109 call void asm sideeffect ".space 831068", ""()
110 ret i64 1
111
112 tail:
113 ret i64 0
114 }
115
116 define i64 @expand_BLTZC64(i64 %a, i64 %b) {
117 %cmp = icmp eq i64 %a, %b
118 br i1 %cmp, label %iftrue, label %tail
119
120 iftrue:
121 call void asm sideeffect ".space 831068", ""()
122 ret i64 1
123
124 tail:
125 ret i64 0
126 }
127
128 define i64 @expand_BGEZC64(i64 %a, i64 %b) {
129 %cmp = icmp eq i64 %a, %b
130 br i1 %cmp, label %iftrue, label %tail
131
132 iftrue:
133 call void asm sideeffect ".space 831068", ""()
134 ret i64 1
135
136 tail:
137 ret i64 0
138 }
139
140 define i64 @expand_BGTZC64(i64 %a, i64 %b) {
141 %cmp = icmp eq i64 %a, %b
142 br i1 %cmp, label %iftrue, label %tail
143
144 iftrue:
145 call void asm sideeffect ".space 831068", ""()
146 ret i64 1
147
148 tail:
149 ret i64 0
150 }
151
152...
153---
154
155name: expand_BNEZC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]156alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]157exposesReturnsTwice: false
158legalized: false
159regBankSelected: false
160selected: false
161failedISel: false
162tracksRegLiveness: true
163registers:
164liveins:
165 - { reg: '$a0_64', virtual-reg: '' }
166frameInfo:
167 isFrameAddressTaken: false
168 isReturnAddressTaken: false
169 hasStackMap: false
170 hasPatchPoint: false
171 stackSize: 0
172 offsetAdjustment: 0
173 maxAlignment: 1
174 adjustsStack: false
175 hasCalls: false
176 stackProtector: ''
177 maxCallFrameSize: 0
178 hasOpaqueSPAdjustment: false
179 hasVAStart: false
180 hasMustTailInVarArgFunc: false
181 localFrameSize: 0
182 savePoint: ''
183 restorePoint: ''
184fixedStack:
185stack:
186constants:
187body: |
188 ; MIPS64-LABEL: name: expand_BNEZC64
189 ; MIPS64: bb.0 (%ir-block.0):
190 ; MIPS64: successors: %bb.1(0x40000000), %bb.2(0x40000000)
191 ; MIPS64: BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
192 ; MIPS64: bb.1.iftrue:
193 ; MIPS64: INLINEASM &".space 831068", 1
194 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
195 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
196 ; MIPS64: }
197 ; MIPS64: bb.2.tail:
198 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
199 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
200 ; MIPS64: }
201 ; PIC-LABEL: name: expand_BNEZC64
202 ; PIC: bb.0 (%ir-block.0):
203 ; PIC: successors: %bb.1(0x40000000), %bb.2(0x40000000)
204 ; PIC: BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
205 ; PIC: bb.1.iftrue:
206 ; PIC: INLINEASM &".space 831068", 1
207 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
208 ; PIC: $v0_64 = DADDiu $zero_64, 1
209 ; PIC: }
210 ; PIC: bb.2.tail:
211 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
212 ; PIC: $v0_64 = DADDiu $zero_64, 0
213 ; PIC: }
214 bb.0 (%ir-block.0):
215 successors: %bb.1(0x40000000), %bb.2(0x40000000)
216 liveins: $a0_64
217
218 BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
219
220 bb.1.iftrue:
221 INLINEASM &".space 831068", 1
222 $v0_64 = DADDiu $zero_64, 1
223 PseudoReturn64 undef $ra_64, implicit killed $v0_64
224
225 bb.2.tail:
226 $v0_64 = DADDiu $zero_64, 0
227 PseudoReturn64 undef $ra_64, implicit killed $v0_64
228
229...
230---
231
232name: expand_BEQZC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]233alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]234exposesReturnsTwice: false
235legalized: false
236regBankSelected: false
237selected: false
238failedISel: false
239tracksRegLiveness: true
240registers:
241liveins:
242 - { reg: '$a0_64', virtual-reg: '' }
243frameInfo:
244 isFrameAddressTaken: false
245 isReturnAddressTaken: false
246 hasStackMap: false
247 hasPatchPoint: false
248 stackSize: 0
249 offsetAdjustment: 0
250 maxAlignment: 1
251 adjustsStack: false
252 hasCalls: false
253 stackProtector: ''
254 maxCallFrameSize: 0
255 hasOpaqueSPAdjustment: false
256 hasVAStart: false
257 hasMustTailInVarArgFunc: false
258 localFrameSize: 0
259 savePoint: ''
260 restorePoint: ''
261fixedStack:
262stack:
263constants:
264body: |
265 ; MIPS64-LABEL: name: expand_BEQZC64
266 ; MIPS64: bb.0 (%ir-block.0):
267 ; MIPS64: successors: %bb.1(0x40000000), %bb.2(0x40000000)
268 ; MIPS64: BEQZC64 killed renamable $a0_64, %bb.2, implicit-def $at
269 ; MIPS64: bb.1.iftrue:
270 ; MIPS64: INLINEASM &".space 831068", 1
271 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
272 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
273 ; MIPS64: }
274 ; MIPS64: bb.2.tail:
275 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
276 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
277 ; MIPS64: }
278 ; PIC-LABEL: name: expand_BEQZC64
279 ; PIC: bb.0 (%ir-block.0):
280 ; PIC: successors: %bb.1(0x40000000), %bb.2(0x40000000)
281 ; PIC: BEQZC64 killed renamable $a0_64, %bb.2, implicit-def $at
282 ; PIC: bb.1.iftrue:
283 ; PIC: INLINEASM &".space 831068", 1
284 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
285 ; PIC: $v0_64 = DADDiu $zero_64, 1
286 ; PIC: }
287 ; PIC: bb.2.tail:
288 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
289 ; PIC: $v0_64 = DADDiu $zero_64, 0
290 ; PIC: }
291 bb.0 (%ir-block.0):
292 successors: %bb.1(0x40000000), %bb.2(0x40000000)
293 liveins: $a0_64
294
295 BEQZC64 killed renamable $a0_64, %bb.2, implicit-def $at
296
297 bb.1.iftrue:
298 INLINEASM &".space 831068", 1
299 $v0_64 = DADDiu $zero_64, 1
300 PseudoReturn64 undef $ra_64, implicit killed $v0_64
301
302 bb.2.tail:
303 $v0_64 = DADDiu $zero_64, 0
304 PseudoReturn64 undef $ra_64, implicit killed $v0_64
305
306...
307---
308
309name: expand_BNEC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]310alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]311exposesReturnsTwice: false
312legalized: false
313regBankSelected: false
314selected: false
315failedISel: false
316tracksRegLiveness: true
317registers:
318liveins:
319 - { reg: '$a0_64', virtual-reg: '' }
320frameInfo:
321 isFrameAddressTaken: false
322 isReturnAddressTaken: false
323 hasStackMap: false
324 hasPatchPoint: false
325 stackSize: 0
326 offsetAdjustment: 0
327 maxAlignment: 1
328 adjustsStack: false
329 hasCalls: false
330 stackProtector: ''
331 maxCallFrameSize: 0
332 hasOpaqueSPAdjustment: false
333 hasVAStart: false
334 hasMustTailInVarArgFunc: false
335 localFrameSize: 0
336 savePoint: ''
337 restorePoint: ''
338fixedStack:
339stack:
340constants:
341body: |
342 ; MIPS64-LABEL: name: expand_BNEC64
343 ; MIPS64: bb.0 (%ir-block.0):
344 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
345 ; MIPS64: BEQC64 $a0_64, $zero_64, %bb.2, implicit-def $at
346 ; MIPS64: bb.1 (%ir-block.0):
347 ; MIPS64: successors: %bb.3(0x80000000)
348 ; MIPS64: J %bb.3, implicit-def $at {
349 ; MIPS64: NOP
350 ; MIPS64: }
351 ; MIPS64: bb.2.iftrue:
352 ; MIPS64: INLINEASM &".space 831068", 1
353 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
354 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
355 ; MIPS64: }
356 ; MIPS64: bb.3.tail:
357 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
358 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
359 ; MIPS64: }
360 ; PIC-LABEL: name: expand_BNEC64
361 ; PIC: bb.0 (%ir-block.0):
362 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
363 ; PIC: BEQC64 $a0_64, $zero_64, %bb.3, implicit-def $at
364 ; PIC: bb.1 (%ir-block.0):
365 ; PIC: successors: %bb.2(0x80000000)
366 ; PIC: $sp_64 = DADDiu $sp_64, -16
367 ; PIC: SD $ra_64, $sp_64, 0
368 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
369 ; PIC: $at_64 = DSLL $at_64, 16
370 ; PIC: BAL_BR %bb.2, implicit-def $ra {
371 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
372 ; PIC: }
373 ; PIC: bb.2 (%ir-block.0):
374 ; PIC: successors: %bb.4(0x80000000)
375 ; PIC: $at_64 = DADDu $ra_64, $at_64
376 ; PIC: $ra_64 = LD $sp_64, 0
377 ; PIC: JR64 $at_64 {
378 ; PIC: $sp_64 = DADDiu $sp_64, 16
379 ; PIC: }
380 ; PIC: bb.3.iftrue:
381 ; PIC: INLINEASM &".space 831068", 1
382 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
383 ; PIC: $v0_64 = DADDiu $zero_64, 1
384 ; PIC: }
385 ; PIC: bb.4.tail:
386 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
387 ; PIC: $v0_64 = DADDiu $zero_64, 0
388 ; PIC: }
389 bb.0 (%ir-block.0):
390 successors: %bb.1(0x40000000), %bb.2(0x40000000)
391 liveins: $a0_64
392
393 BNEC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
394
395 bb.1.iftrue:
396 INLINEASM &".space 831068", 1
397 $v0_64 = DADDiu $zero_64, 1
398 PseudoReturn64 undef $ra_64, implicit killed $v0_64
399
400 bb.2.tail:
401 $v0_64 = DADDiu $zero_64, 0
402 PseudoReturn64 undef $ra_64, implicit killed $v0_64
403
404...
405---
406
407name: expand_BEQC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]408alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]409exposesReturnsTwice: false
410legalized: false
411regBankSelected: false
412selected: false
413failedISel: false
414tracksRegLiveness: true
415registers:
416liveins:
417 - { reg: '$a0_64', virtual-reg: '' }
418frameInfo:
419 isFrameAddressTaken: false
420 isReturnAddressTaken: false
421 hasStackMap: false
422 hasPatchPoint: false
423 stackSize: 0
424 offsetAdjustment: 0
425 maxAlignment: 1
426 adjustsStack: false
427 hasCalls: false
428 stackProtector: ''
429 maxCallFrameSize: 0
430 hasOpaqueSPAdjustment: false
431 hasVAStart: false
432 hasMustTailInVarArgFunc: false
433 localFrameSize: 0
434 savePoint: ''
435 restorePoint: ''
436fixedStack:
437stack:
438constants:
439body: |
440 ; MIPS64-LABEL: name: expand_BEQC64
441 ; MIPS64: bb.0 (%ir-block.0):
442 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
443 ; MIPS64: BNEC64 $a0_64, $zero_64, %bb.2, implicit-def $at
444 ; MIPS64: bb.1 (%ir-block.0):
445 ; MIPS64: successors: %bb.3(0x80000000)
446 ; MIPS64: J %bb.3, implicit-def $at {
447 ; MIPS64: NOP
448 ; MIPS64: }
449 ; MIPS64: bb.2.iftrue:
450 ; MIPS64: INLINEASM &".space 831068", 1
451 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
452 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
453 ; MIPS64: }
454 ; MIPS64: bb.3.tail:
455 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
456 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
457 ; MIPS64: }
458 ; PIC-LABEL: name: expand_BEQC64
459 ; PIC: bb.0 (%ir-block.0):
460 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
461 ; PIC: BNEC64 $a0_64, $zero_64, %bb.3, implicit-def $at
462 ; PIC: bb.1 (%ir-block.0):
463 ; PIC: successors: %bb.2(0x80000000)
464 ; PIC: $sp_64 = DADDiu $sp_64, -16
465 ; PIC: SD $ra_64, $sp_64, 0
466 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
467 ; PIC: $at_64 = DSLL $at_64, 16
468 ; PIC: BAL_BR %bb.2, implicit-def $ra {
469 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
470 ; PIC: }
471 ; PIC: bb.2 (%ir-block.0):
472 ; PIC: successors: %bb.4(0x80000000)
473 ; PIC: $at_64 = DADDu $ra_64, $at_64
474 ; PIC: $ra_64 = LD $sp_64, 0
475 ; PIC: JR64 $at_64 {
476 ; PIC: $sp_64 = DADDiu $sp_64, 16
477 ; PIC: }
478 ; PIC: bb.3.iftrue:
479 ; PIC: INLINEASM &".space 831068", 1
480 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
481 ; PIC: $v0_64 = DADDiu $zero_64, 1
482 ; PIC: }
483 ; PIC: bb.4.tail:
484 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
485 ; PIC: $v0_64 = DADDiu $zero_64, 0
486 ; PIC: }
487 bb.0 (%ir-block.0):
488 successors: %bb.1(0x40000000), %bb.2(0x40000000)
489 liveins: $a0_64
490
491 BEQC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
492
493 bb.1.iftrue:
494 INLINEASM &".space 831068", 1
495 $v0_64 = DADDiu $zero_64, 1
496 PseudoReturn64 undef $ra_64, implicit killed $v0_64
497
498 bb.2.tail:
499 $v0_64 = DADDiu $zero_64, 0
500 PseudoReturn64 undef $ra_64, implicit killed $v0_64
501
502...
503---
504
505name: expand_BLTC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]506alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]507exposesReturnsTwice: false
508legalized: false
509regBankSelected: false
510selected: false
511failedISel: false
512tracksRegLiveness: true
513registers:
514liveins:
515 - { reg: '$a0_64', virtual-reg: '' }
516frameInfo:
517 isFrameAddressTaken: false
518 isReturnAddressTaken: false
519 hasStackMap: false
520 hasPatchPoint: false
521 stackSize: 0
522 offsetAdjustment: 0
523 maxAlignment: 1
524 adjustsStack: false
525 hasCalls: false
526 stackProtector: ''
527 maxCallFrameSize: 0
528 hasOpaqueSPAdjustment: false
529 hasVAStart: false
530 hasMustTailInVarArgFunc: false
531 localFrameSize: 0
532 savePoint: ''
533 restorePoint: ''
534fixedStack:
535stack:
536constants:
537body: |
538 ; MIPS64-LABEL: name: expand_BLTC64
539 ; MIPS64: bb.0 (%ir-block.0):
540 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
541 ; MIPS64: BGEC64 $a0_64, $zero_64, %bb.2, implicit-def $at
542 ; MIPS64: bb.1 (%ir-block.0):
543 ; MIPS64: successors: %bb.3(0x80000000)
544 ; MIPS64: J %bb.3, implicit-def $at {
545 ; MIPS64: NOP
546 ; MIPS64: }
547 ; MIPS64: bb.2.iftrue:
548 ; MIPS64: INLINEASM &".space 831068", 1
549 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
550 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
551 ; MIPS64: }
552 ; MIPS64: bb.3.tail:
553 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
554 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
555 ; MIPS64: }
556 ; PIC-LABEL: name: expand_BLTC64
557 ; PIC: bb.0 (%ir-block.0):
558 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
559 ; PIC: BGEC64 $a0_64, $zero_64, %bb.3, implicit-def $at
560 ; PIC: bb.1 (%ir-block.0):
561 ; PIC: successors: %bb.2(0x80000000)
562 ; PIC: $sp_64 = DADDiu $sp_64, -16
563 ; PIC: SD $ra_64, $sp_64, 0
564 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
565 ; PIC: $at_64 = DSLL $at_64, 16
566 ; PIC: BAL_BR %bb.2, implicit-def $ra {
567 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
568 ; PIC: }
569 ; PIC: bb.2 (%ir-block.0):
570 ; PIC: successors: %bb.4(0x80000000)
571 ; PIC: $at_64 = DADDu $ra_64, $at_64
572 ; PIC: $ra_64 = LD $sp_64, 0
573 ; PIC: JR64 $at_64 {
574 ; PIC: $sp_64 = DADDiu $sp_64, 16
575 ; PIC: }
576 ; PIC: bb.3.iftrue:
577 ; PIC: INLINEASM &".space 831068", 1
578 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
579 ; PIC: $v0_64 = DADDiu $zero_64, 1
580 ; PIC: }
581 ; PIC: bb.4.tail:
582 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
583 ; PIC: $v0_64 = DADDiu $zero_64, 0
584 ; PIC: }
585 bb.0 (%ir-block.0):
586 successors: %bb.1(0x40000000), %bb.2(0x40000000)
587 liveins: $a0_64
588
589 BLTC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
590
591 bb.1.iftrue:
592 INLINEASM &".space 831068", 1
593 $v0_64 = DADDiu $zero_64, 1
594 PseudoReturn64 undef $ra_64, implicit killed $v0_64
595
596 bb.2.tail:
597 $v0_64 = DADDiu $zero_64, 0
598 PseudoReturn64 undef $ra_64, implicit killed $v0_64
599
600...
601---
602
603name: expand_BLTUC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]604alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]605exposesReturnsTwice: false
606legalized: false
607regBankSelected: false
608selected: false
609failedISel: false
610tracksRegLiveness: true
611registers:
612liveins:
613 - { reg: '$a0_64', virtual-reg: '' }
614frameInfo:
615 isFrameAddressTaken: false
616 isReturnAddressTaken: false
617 hasStackMap: false
618 hasPatchPoint: false
619 stackSize: 0
620 offsetAdjustment: 0
621 maxAlignment: 1
622 adjustsStack: false
623 hasCalls: false
624 stackProtector: ''
625 maxCallFrameSize: 0
626 hasOpaqueSPAdjustment: false
627 hasVAStart: false
628 hasMustTailInVarArgFunc: false
629 localFrameSize: 0
630 savePoint: ''
631 restorePoint: ''
632fixedStack:
633stack:
634constants:
635body: |
636 ; MIPS64-LABEL: name: expand_BLTUC64
637 ; MIPS64: bb.0 (%ir-block.0):
638 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
639 ; MIPS64: BGEUC64 $a0_64, $zero_64, %bb.2, implicit-def $at
640 ; MIPS64: bb.1 (%ir-block.0):
641 ; MIPS64: successors: %bb.3(0x80000000)
642 ; MIPS64: J %bb.3, implicit-def $at {
643 ; MIPS64: NOP
644 ; MIPS64: }
645 ; MIPS64: bb.2.iftrue:
646 ; MIPS64: INLINEASM &".space 831068", 1
647 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
648 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
649 ; MIPS64: }
650 ; MIPS64: bb.3.tail:
651 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
652 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
653 ; MIPS64: }
654 ; PIC-LABEL: name: expand_BLTUC64
655 ; PIC: bb.0 (%ir-block.0):
656 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
657 ; PIC: BGEUC64 $a0_64, $zero_64, %bb.3, implicit-def $at
658 ; PIC: bb.1 (%ir-block.0):
659 ; PIC: successors: %bb.2(0x80000000)
660 ; PIC: $sp_64 = DADDiu $sp_64, -16
661 ; PIC: SD $ra_64, $sp_64, 0
662 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
663 ; PIC: $at_64 = DSLL $at_64, 16
664 ; PIC: BAL_BR %bb.2, implicit-def $ra {
665 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
666 ; PIC: }
667 ; PIC: bb.2 (%ir-block.0):
668 ; PIC: successors: %bb.4(0x80000000)
669 ; PIC: $at_64 = DADDu $ra_64, $at_64
670 ; PIC: $ra_64 = LD $sp_64, 0
671 ; PIC: JR64 $at_64 {
672 ; PIC: $sp_64 = DADDiu $sp_64, 16
673 ; PIC: }
674 ; PIC: bb.3.iftrue:
675 ; PIC: INLINEASM &".space 831068", 1
676 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
677 ; PIC: $v0_64 = DADDiu $zero_64, 1
678 ; PIC: }
679 ; PIC: bb.4.tail:
680 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
681 ; PIC: $v0_64 = DADDiu $zero_64, 0
682 ; PIC: }
683 bb.0 (%ir-block.0):
684 successors: %bb.1(0x40000000), %bb.2(0x40000000)
685 liveins: $a0_64
686
687 BLTUC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
688
689 bb.1.iftrue:
690 INLINEASM &".space 831068", 1
691 $v0_64 = DADDiu $zero_64, 1
692 PseudoReturn64 undef $ra_64, implicit killed $v0_64
693
694 bb.2.tail:
695 $v0_64 = DADDiu $zero_64, 0
696 PseudoReturn64 undef $ra_64, implicit killed $v0_64
697
698...
699---
700
701name: expand_BGEC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]702alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]703exposesReturnsTwice: false
704legalized: false
705regBankSelected: false
706selected: false
707failedISel: false
708tracksRegLiveness: true
709registers:
710liveins:
711 - { reg: '$a0_64', virtual-reg: '' }
712frameInfo:
713 isFrameAddressTaken: false
714 isReturnAddressTaken: false
715 hasStackMap: false
716 hasPatchPoint: false
717 stackSize: 0
718 offsetAdjustment: 0
719 maxAlignment: 1
720 adjustsStack: false
721 hasCalls: false
722 stackProtector: ''
723 maxCallFrameSize: 0
724 hasOpaqueSPAdjustment: false
725 hasVAStart: false
726 hasMustTailInVarArgFunc: false
727 localFrameSize: 0
728 savePoint: ''
729 restorePoint: ''
730fixedStack:
731stack:
732constants:
733body: |
734 ; MIPS64-LABEL: name: expand_BGEC64
735 ; MIPS64: bb.0 (%ir-block.0):
736 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
737 ; MIPS64: BLTC64 $a0_64, $zero_64, %bb.2, implicit-def $at
738 ; MIPS64: bb.1 (%ir-block.0):
739 ; MIPS64: successors: %bb.3(0x80000000)
740 ; MIPS64: J %bb.3, implicit-def $at {
741 ; MIPS64: NOP
742 ; MIPS64: }
743 ; MIPS64: bb.2.iftrue:
744 ; MIPS64: INLINEASM &".space 831068", 1
745 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
746 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
747 ; MIPS64: }
748 ; MIPS64: bb.3.tail:
749 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
750 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
751 ; MIPS64: }
752 ; PIC-LABEL: name: expand_BGEC64
753 ; PIC: bb.0 (%ir-block.0):
754 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
755 ; PIC: BLTC64 $a0_64, $zero_64, %bb.3, implicit-def $at
756 ; PIC: bb.1 (%ir-block.0):
757 ; PIC: successors: %bb.2(0x80000000)
758 ; PIC: $sp_64 = DADDiu $sp_64, -16
759 ; PIC: SD $ra_64, $sp_64, 0
760 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
761 ; PIC: $at_64 = DSLL $at_64, 16
762 ; PIC: BAL_BR %bb.2, implicit-def $ra {
763 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
764 ; PIC: }
765 ; PIC: bb.2 (%ir-block.0):
766 ; PIC: successors: %bb.4(0x80000000)
767 ; PIC: $at_64 = DADDu $ra_64, $at_64
768 ; PIC: $ra_64 = LD $sp_64, 0
769 ; PIC: JR64 $at_64 {
770 ; PIC: $sp_64 = DADDiu $sp_64, 16
771 ; PIC: }
772 ; PIC: bb.3.iftrue:
773 ; PIC: INLINEASM &".space 831068", 1
774 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
775 ; PIC: $v0_64 = DADDiu $zero_64, 1
776 ; PIC: }
777 ; PIC: bb.4.tail:
778 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
779 ; PIC: $v0_64 = DADDiu $zero_64, 0
780 ; PIC: }
781 bb.0 (%ir-block.0):
782 successors: %bb.1(0x40000000), %bb.2(0x40000000)
783 liveins: $a0_64
784
785 BGEC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
786
787 bb.1.iftrue:
788 INLINEASM &".space 831068", 1
789 $v0_64 = DADDiu $zero_64, 1
790 PseudoReturn64 undef $ra_64, implicit killed $v0_64
791
792 bb.2.tail:
793 $v0_64 = DADDiu $zero_64, 0
794 PseudoReturn64 undef $ra_64, implicit killed $v0_64
795
796...
797---
798
799name: expand_BGEUC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]800alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]801exposesReturnsTwice: false
802legalized: false
803regBankSelected: false
804selected: false
805failedISel: false
806tracksRegLiveness: true
807registers:
808liveins:
809 - { reg: '$a0_64', virtual-reg: '' }
810frameInfo:
811 isFrameAddressTaken: false
812 isReturnAddressTaken: false
813 hasStackMap: false
814 hasPatchPoint: false
815 stackSize: 0
816 offsetAdjustment: 0
817 maxAlignment: 1
818 adjustsStack: false
819 hasCalls: false
820 stackProtector: ''
821 maxCallFrameSize: 0
822 hasOpaqueSPAdjustment: false
823 hasVAStart: false
824 hasMustTailInVarArgFunc: false
825 localFrameSize: 0
826 savePoint: ''
827 restorePoint: ''
828fixedStack:
829stack:
830constants:
831body: |
832 ; MIPS64-LABEL: name: expand_BGEUC64
833 ; MIPS64: bb.0 (%ir-block.0):
834 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
835 ; MIPS64: BLTUC64 $a0_64, $zero_64, %bb.2, implicit-def $at
836 ; MIPS64: bb.1 (%ir-block.0):
837 ; MIPS64: successors: %bb.3(0x80000000)
838 ; MIPS64: J %bb.3, implicit-def $at {
839 ; MIPS64: NOP
840 ; MIPS64: }
841 ; MIPS64: bb.2.iftrue:
842 ; MIPS64: INLINEASM &".space 831068", 1
843 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
844 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
845 ; MIPS64: }
846 ; MIPS64: bb.3.tail:
847 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
848 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
849 ; MIPS64: }
850 ; PIC-LABEL: name: expand_BGEUC64
851 ; PIC: bb.0 (%ir-block.0):
852 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
853 ; PIC: BLTUC64 $a0_64, $zero_64, %bb.3, implicit-def $at
854 ; PIC: bb.1 (%ir-block.0):
855 ; PIC: successors: %bb.2(0x80000000)
856 ; PIC: $sp_64 = DADDiu $sp_64, -16
857 ; PIC: SD $ra_64, $sp_64, 0
858 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
859 ; PIC: $at_64 = DSLL $at_64, 16
860 ; PIC: BAL_BR %bb.2, implicit-def $ra {
861 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
862 ; PIC: }
863 ; PIC: bb.2 (%ir-block.0):
864 ; PIC: successors: %bb.4(0x80000000)
865 ; PIC: $at_64 = DADDu $ra_64, $at_64
866 ; PIC: $ra_64 = LD $sp_64, 0
867 ; PIC: JR64 $at_64 {
868 ; PIC: $sp_64 = DADDiu $sp_64, 16
869 ; PIC: }
870 ; PIC: bb.3.iftrue:
871 ; PIC: INLINEASM &".space 831068", 1
872 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
873 ; PIC: $v0_64 = DADDiu $zero_64, 1
874 ; PIC: }
875 ; PIC: bb.4.tail:
876 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
877 ; PIC: $v0_64 = DADDiu $zero_64, 0
878 ; PIC: }
879 bb.0 (%ir-block.0):
880 successors: %bb.1(0x40000000), %bb.2(0x40000000)
881 liveins: $a0_64
882
883 BGEUC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
884
885 bb.1.iftrue:
886 INLINEASM &".space 831068", 1
887 $v0_64 = DADDiu $zero_64, 1
888 PseudoReturn64 undef $ra_64, implicit killed $v0_64
889
890 bb.2.tail:
891 $v0_64 = DADDiu $zero_64, 0
892 PseudoReturn64 undef $ra_64, implicit killed $v0_64
893
894...
895---
896
897name: expand_BLEZC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]898alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]899exposesReturnsTwice: false
900legalized: false
901regBankSelected: false
902selected: false
903failedISel: false
904tracksRegLiveness: true
905registers:
906liveins:
907 - { reg: '$a0_64', virtual-reg: '' }
908frameInfo:
909 isFrameAddressTaken: false
910 isReturnAddressTaken: false
911 hasStackMap: false
912 hasPatchPoint: false
913 stackSize: 0
914 offsetAdjustment: 0
915 maxAlignment: 1
916 adjustsStack: false
917 hasCalls: false
918 stackProtector: ''
919 maxCallFrameSize: 0
920 hasOpaqueSPAdjustment: false
921 hasVAStart: false
922 hasMustTailInVarArgFunc: false
923 localFrameSize: 0
924 savePoint: ''
925 restorePoint: ''
926fixedStack:
927stack:
928constants:
929body: |
930 ; MIPS64-LABEL: name: expand_BLEZC64
931 ; MIPS64: bb.0 (%ir-block.0):
932 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
933 ; MIPS64: BGTZC64 $a0_64, %bb.2, implicit-def $at
934 ; MIPS64: bb.1 (%ir-block.0):
935 ; MIPS64: successors: %bb.3(0x80000000)
936 ; MIPS64: J %bb.3, implicit-def $at {
937 ; MIPS64: NOP
938 ; MIPS64: }
939 ; MIPS64: bb.2.iftrue:
940 ; MIPS64: INLINEASM &".space 831068", 1
941 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
942 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
943 ; MIPS64: }
944 ; MIPS64: bb.3.tail:
945 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
946 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
947 ; MIPS64: }
948 ; PIC-LABEL: name: expand_BLEZC64
949 ; PIC: bb.0 (%ir-block.0):
950 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
951 ; PIC: BGTZC64 $a0_64, %bb.3, implicit-def $at
952 ; PIC: bb.1 (%ir-block.0):
953 ; PIC: successors: %bb.2(0x80000000)
954 ; PIC: $sp_64 = DADDiu $sp_64, -16
955 ; PIC: SD $ra_64, $sp_64, 0
956 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
957 ; PIC: $at_64 = DSLL $at_64, 16
958 ; PIC: BAL_BR %bb.2, implicit-def $ra {
959 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
960 ; PIC: }
961 ; PIC: bb.2 (%ir-block.0):
962 ; PIC: successors: %bb.4(0x80000000)
963 ; PIC: $at_64 = DADDu $ra_64, $at_64
964 ; PIC: $ra_64 = LD $sp_64, 0
965 ; PIC: JR64 $at_64 {
966 ; PIC: $sp_64 = DADDiu $sp_64, 16
967 ; PIC: }
968 ; PIC: bb.3.iftrue:
969 ; PIC: INLINEASM &".space 831068", 1
970 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
971 ; PIC: $v0_64 = DADDiu $zero_64, 1
972 ; PIC: }
973 ; PIC: bb.4.tail:
974 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
975 ; PIC: $v0_64 = DADDiu $zero_64, 0
976 ; PIC: }
977 bb.0 (%ir-block.0):
978 successors: %bb.1(0x40000000), %bb.2(0x40000000)
979 liveins: $a0_64
980
981 BLEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
982
983 bb.1.iftrue:
984 INLINEASM &".space 831068", 1
985 $v0_64 = DADDiu $zero_64, 1
986 PseudoReturn64 undef $ra_64, implicit killed $v0_64
987
988 bb.2.tail:
989 $v0_64 = DADDiu $zero_64, 0
990 PseudoReturn64 undef $ra_64, implicit killed $v0_64
991
992...
993---
994
995name: expand_BLTZC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]996alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]997exposesReturnsTwice: false
998legalized: false
999regBankSelected: false
1000selected: false
1001failedISel: false
1002tracksRegLiveness: true
1003registers:
1004liveins:
1005 - { reg: '$a0_64', virtual-reg: '' }
1006frameInfo:
1007 isFrameAddressTaken: false
1008 isReturnAddressTaken: false
1009 hasStackMap: false
1010 hasPatchPoint: false
1011 stackSize: 0
1012 offsetAdjustment: 0
1013 maxAlignment: 1
1014 adjustsStack: false
1015 hasCalls: false
1016 stackProtector: ''
1017 maxCallFrameSize: 0
1018 hasOpaqueSPAdjustment: false
1019 hasVAStart: false
1020 hasMustTailInVarArgFunc: false
1021 localFrameSize: 0
1022 savePoint: ''
1023 restorePoint: ''
1024fixedStack:
1025stack:
1026constants:
1027body: |
1028 ; MIPS64-LABEL: name: expand_BLTZC64
1029 ; MIPS64: bb.0 (%ir-block.0):
1030 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
1031 ; MIPS64: BGEZC64 $a0_64, %bb.2, implicit-def $at
1032 ; MIPS64: bb.1 (%ir-block.0):
1033 ; MIPS64: successors: %bb.3(0x80000000)
1034 ; MIPS64: J %bb.3, implicit-def $at {
1035 ; MIPS64: NOP
1036 ; MIPS64: }
1037 ; MIPS64: bb.2.iftrue:
1038 ; MIPS64: INLINEASM &".space 831068", 1
1039 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1040 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
1041 ; MIPS64: }
1042 ; MIPS64: bb.3.tail:
1043 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1044 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
1045 ; MIPS64: }
1046 ; PIC-LABEL: name: expand_BLTZC64
1047 ; PIC: bb.0 (%ir-block.0):
1048 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
1049 ; PIC: BGEZC64 $a0_64, %bb.3, implicit-def $at
1050 ; PIC: bb.1 (%ir-block.0):
1051 ; PIC: successors: %bb.2(0x80000000)
1052 ; PIC: $sp_64 = DADDiu $sp_64, -16
1053 ; PIC: SD $ra_64, $sp_64, 0
1054 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
1055 ; PIC: $at_64 = DSLL $at_64, 16
1056 ; PIC: BAL_BR %bb.2, implicit-def $ra {
1057 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
1058 ; PIC: }
1059 ; PIC: bb.2 (%ir-block.0):
1060 ; PIC: successors: %bb.4(0x80000000)
1061 ; PIC: $at_64 = DADDu $ra_64, $at_64
1062 ; PIC: $ra_64 = LD $sp_64, 0
1063 ; PIC: JR64 $at_64 {
1064 ; PIC: $sp_64 = DADDiu $sp_64, 16
1065 ; PIC: }
1066 ; PIC: bb.3.iftrue:
1067 ; PIC: INLINEASM &".space 831068", 1
1068 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1069 ; PIC: $v0_64 = DADDiu $zero_64, 1
1070 ; PIC: }
1071 ; PIC: bb.4.tail:
1072 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1073 ; PIC: $v0_64 = DADDiu $zero_64, 0
1074 ; PIC: }
1075 bb.0 (%ir-block.0):
1076 successors: %bb.1(0x40000000), %bb.2(0x40000000)
1077 liveins: $a0_64
1078
1079 BLTZC64 killed renamable $a0_64, %bb.2, implicit-def $at
1080
1081 bb.1.iftrue:
1082 INLINEASM &".space 831068", 1
1083 $v0_64 = DADDiu $zero_64, 1
1084 PseudoReturn64 undef $ra_64, implicit killed $v0_64
1085
1086 bb.2.tail:
1087 $v0_64 = DADDiu $zero_64, 0
1088 PseudoReturn64 undef $ra_64, implicit killed $v0_64
1089
1090...
1091---
1092
1093name: expand_BGEZC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]1094alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]1095exposesReturnsTwice: false
1096legalized: false
1097regBankSelected: false
1098selected: false
1099failedISel: false
1100tracksRegLiveness: true
1101registers:
1102liveins:
1103 - { reg: '$a0_64', virtual-reg: '' }
1104frameInfo:
1105 isFrameAddressTaken: false
1106 isReturnAddressTaken: false
1107 hasStackMap: false
1108 hasPatchPoint: false
1109 stackSize: 0
1110 offsetAdjustment: 0
1111 maxAlignment: 1
1112 adjustsStack: false
1113 hasCalls: false
1114 stackProtector: ''
1115 maxCallFrameSize: 0
1116 hasOpaqueSPAdjustment: false
1117 hasVAStart: false
1118 hasMustTailInVarArgFunc: false
1119 localFrameSize: 0
1120 savePoint: ''
1121 restorePoint: ''
1122fixedStack:
1123stack:
1124constants:
1125body: |
1126 ; MIPS64-LABEL: name: expand_BGEZC64
1127 ; MIPS64: bb.0 (%ir-block.0):
1128 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
1129 ; MIPS64: BLTZC64 $a0_64, %bb.2, implicit-def $at
1130 ; MIPS64: bb.1 (%ir-block.0):
1131 ; MIPS64: successors: %bb.3(0x80000000)
1132 ; MIPS64: J %bb.3, implicit-def $at {
1133 ; MIPS64: NOP
1134 ; MIPS64: }
1135 ; MIPS64: bb.2.iftrue:
1136 ; MIPS64: INLINEASM &".space 831068", 1
1137 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1138 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
1139 ; MIPS64: }
1140 ; MIPS64: bb.3.tail:
1141 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1142 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
1143 ; MIPS64: }
1144 ; PIC-LABEL: name: expand_BGEZC64
1145 ; PIC: bb.0 (%ir-block.0):
1146 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
1147 ; PIC: BLTZC64 $a0_64, %bb.3, implicit-def $at
1148 ; PIC: bb.1 (%ir-block.0):
1149 ; PIC: successors: %bb.2(0x80000000)
1150 ; PIC: $sp_64 = DADDiu $sp_64, -16
1151 ; PIC: SD $ra_64, $sp_64, 0
1152 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
1153 ; PIC: $at_64 = DSLL $at_64, 16
1154 ; PIC: BAL_BR %bb.2, implicit-def $ra {
1155 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
1156 ; PIC: }
1157 ; PIC: bb.2 (%ir-block.0):
1158 ; PIC: successors: %bb.4(0x80000000)
1159 ; PIC: $at_64 = DADDu $ra_64, $at_64
1160 ; PIC: $ra_64 = LD $sp_64, 0
1161 ; PIC: JR64 $at_64 {
1162 ; PIC: $sp_64 = DADDiu $sp_64, 16
1163 ; PIC: }
1164 ; PIC: bb.3.iftrue:
1165 ; PIC: INLINEASM &".space 831068", 1
1166 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1167 ; PIC: $v0_64 = DADDiu $zero_64, 1
1168 ; PIC: }
1169 ; PIC: bb.4.tail:
1170 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1171 ; PIC: $v0_64 = DADDiu $zero_64, 0
1172 ; PIC: }
1173 bb.0 (%ir-block.0):
1174 successors: %bb.1(0x40000000), %bb.2(0x40000000)
1175 liveins: $a0_64
1176
1177 BGEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
1178
1179 bb.1.iftrue:
1180 INLINEASM &".space 831068", 1
1181 $v0_64 = DADDiu $zero_64, 1
1182 PseudoReturn64 undef $ra_64, implicit killed $v0_64
1183
1184 bb.2.tail:
1185 $v0_64 = DADDiu $zero_64, 0
1186 PseudoReturn64 undef $ra_64, implicit killed $v0_64
1187
1188...
1189---
1190
1191name: expand_BGTZC64
Guillaume Chatelet48904e92019-09-11 11:16:48 +0000[diff] [blame]1192alignment: 8
Simon Dardis5cf9de42018-05-16 10:03:05 +0000[diff] [blame]1193exposesReturnsTwice: false
1194legalized: false
1195regBankSelected: false
1196selected: false
1197failedISel: false
1198tracksRegLiveness: true
1199registers:
1200liveins:
1201 - { reg: '$a0_64', virtual-reg: '' }
1202frameInfo:
1203 isFrameAddressTaken: false
1204 isReturnAddressTaken: false
1205 hasStackMap: false
1206 hasPatchPoint: false
1207 stackSize: 0
1208 offsetAdjustment: 0
1209 maxAlignment: 1
1210 adjustsStack: false
1211 hasCalls: false
1212 stackProtector: ''
1213 maxCallFrameSize: 0
1214 hasOpaqueSPAdjustment: false
1215 hasVAStart: false
1216 hasMustTailInVarArgFunc: false
1217 localFrameSize: 0
1218 savePoint: ''
1219 restorePoint: ''
1220fixedStack:
1221stack:
1222constants:
1223body: |
1224 ; MIPS64-LABEL: name: expand_BGTZC64
1225 ; MIPS64: bb.0 (%ir-block.0):
1226 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
1227 ; MIPS64: BLEZC64 $a0_64, %bb.2, implicit-def $at
1228 ; MIPS64: bb.1 (%ir-block.0):
1229 ; MIPS64: successors: %bb.3(0x80000000)
1230 ; MIPS64: J %bb.3, implicit-def $at {
1231 ; MIPS64: NOP
1232 ; MIPS64: }
1233 ; MIPS64: bb.2.iftrue:
1234 ; MIPS64: INLINEASM &".space 831068", 1
1235 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1236 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
1237 ; MIPS64: }
1238 ; MIPS64: bb.3.tail:
1239 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1240 ; MIPS64: $v0_64 = DADDiu $zero_64, 0
1241 ; MIPS64: }
1242 ; PIC-LABEL: name: expand_BGTZC64
1243 ; PIC: bb.0 (%ir-block.0):
1244 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
1245 ; PIC: BLEZC64 $a0_64, %bb.3, implicit-def $at
1246 ; PIC: bb.1 (%ir-block.0):
1247 ; PIC: successors: %bb.2(0x80000000)
1248 ; PIC: $sp_64 = DADDiu $sp_64, -16
1249 ; PIC: SD $ra_64, $sp_64, 0
1250 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2
1251 ; PIC: $at_64 = DSLL $at_64, 16
1252 ; PIC: BAL_BR %bb.2, implicit-def $ra {
1253 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2
1254 ; PIC: }
1255 ; PIC: bb.2 (%ir-block.0):
1256 ; PIC: successors: %bb.4(0x80000000)
1257 ; PIC: $at_64 = DADDu $ra_64, $at_64
1258 ; PIC: $ra_64 = LD $sp_64, 0
1259 ; PIC: JR64 $at_64 {
1260 ; PIC: $sp_64 = DADDiu $sp_64, 16
1261 ; PIC: }
1262 ; PIC: bb.3.iftrue:
1263 ; PIC: INLINEASM &".space 831068", 1
1264 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1265 ; PIC: $v0_64 = DADDiu $zero_64, 1
1266 ; PIC: }
1267 ; PIC: bb.4.tail:
1268 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
1269 ; PIC: $v0_64 = DADDiu $zero_64, 0
1270 ; PIC: }
1271 bb.0 (%ir-block.0):
1272 successors: %bb.1(0x40000000), %bb.2(0x40000000)
1273 liveins: $a0_64
1274
1275 BGTZC64 killed renamable $a0_64, %bb.2, implicit-def $at
1276
1277 bb.1.iftrue:
1278 INLINEASM &".space 831068", 1
1279 $v0_64 = DADDiu $zero_64, 1
1280 PseudoReturn64 undef $ra_64, implicit killed $v0_64
1281
1282 bb.2.tail:
1283 $v0_64 = DADDiu $zero_64, 0
1284 PseudoReturn64 undef $ra_64, implicit killed $v0_64
1285
1286...