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Sjoerd Meijer5c0ef832016-07-22 08:39:12 +00001//===-- ARMBasicBlockInfo.h - Basic Block Information -----------*- C++ -*-===//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +00006//
7//===----------------------------------------------------------------------===//
8//
9// Utility functions and data structure for computing block size.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
14#define LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H
15
Sam Parker966f4e82019-06-17 08:49:09 +000016#include "ARMBaseInstrInfo.h"
17#include "ARMMachineFunctionInfo.h"
Eugene Zelenkoe6cf4372017-01-26 23:40:06 +000018#include "llvm/Support/MathExtras.h"
19#include <algorithm>
20#include <cstdint>
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000021
22namespace llvm {
23
Reid Kleckner904cd3e2019-10-19 01:31:09 +000024struct BasicBlockInfo;
Sam Parker966f4e82019-06-17 08:49:09 +000025using BBInfoVector = SmallVectorImpl<BasicBlockInfo>;
26
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000027/// UnknownPadding - Return the worst case padding that could result from
28/// unknown offset bits. This does not include alignment padding caused by
29/// known offset bits.
30///
Guillaume Chatelet18f805a2019-09-27 12:54:21 +000031/// @param Alignment alignment
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000032/// @param KnownBits Number of known low offset bits.
Guillaume Chatelet18f805a2019-09-27 12:54:21 +000033inline unsigned UnknownPadding(Align Alignment, unsigned KnownBits) {
34 if (KnownBits < Log2(Alignment))
35 return Alignment.value() - (1ull << KnownBits);
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000036 return 0;
37}
38
39/// BasicBlockInfo - Information about the offset and size of a single
40/// basic block.
41struct BasicBlockInfo {
42 /// Offset - Distance from the beginning of the function to the beginning
43 /// of this basic block.
44 ///
45 /// Offsets are computed assuming worst case padding before an aligned
46 /// block. This means that subtracting basic block offsets always gives a
47 /// conservative estimate of the real distance which may be smaller.
48 ///
49 /// Because worst case padding is used, the computed offset of an aligned
50 /// block may not actually be aligned.
Eugene Zelenkoe6cf4372017-01-26 23:40:06 +000051 unsigned Offset = 0;
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000052
53 /// Size - Size of the basic block in bytes. If the block contains
54 /// inline assembly, this is a worst case estimate.
55 ///
56 /// The size does not include any alignment padding whether from the
57 /// beginning of the block, or from an aligned jump table at the end.
Eugene Zelenkoe6cf4372017-01-26 23:40:06 +000058 unsigned Size = 0;
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000059
60 /// KnownBits - The number of low bits in Offset that are known to be
61 /// exact. The remaining bits of Offset are an upper bound.
Eugene Zelenkoe6cf4372017-01-26 23:40:06 +000062 uint8_t KnownBits = 0;
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000063
64 /// Unalign - When non-zero, the block contains instructions (inline asm)
65 /// of unknown size. The real size may be smaller than Size bytes by a
66 /// multiple of 1 << Unalign.
Eugene Zelenkoe6cf4372017-01-26 23:40:06 +000067 uint8_t Unalign = 0;
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000068
Guillaume Chateletd4c46712019-09-18 15:49:49 +000069 /// PostAlign - When > 1, the block terminator contains a .align
70 /// directive, so the end of the block is aligned to PostAlign bytes.
Guillaume Chatelet18f805a2019-09-27 12:54:21 +000071 Align PostAlign;
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000072
Eugene Zelenkoe6cf4372017-01-26 23:40:06 +000073 BasicBlockInfo() = default;
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000074
75 /// Compute the number of known offset bits internally to this block.
76 /// This number should be used to predict worst case padding when
77 /// splitting the block.
78 unsigned internalKnownBits() const {
79 unsigned Bits = Unalign ? Unalign : KnownBits;
80 // If the block size isn't a multiple of the known bits, assume the
81 // worst case padding.
82 if (Size & ((1u << Bits) - 1))
83 Bits = countTrailingZeros(Size);
84 return Bits;
85 }
86
Guillaume Chateletd4c46712019-09-18 15:49:49 +000087 /// Compute the offset immediately following this block. If Align is
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000088 /// specified, return the offset the successor block will get if it has
89 /// this alignment.
Guillaume Chatelet18f805a2019-09-27 12:54:21 +000090 unsigned postOffset(Align Alignment = Align::None()) const {
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000091 unsigned PO = Offset + Size;
Guillaume Chatelet18f805a2019-09-27 12:54:21 +000092 const Align PA = std::max(PostAlign, Alignment);
93 if (PA == Align::None())
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000094 return PO;
95 // Add alignment padding from the terminator.
Guillaume Chateletd4c46712019-09-18 15:49:49 +000096 return PO + UnknownPadding(PA, internalKnownBits());
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +000097 }
98
99 /// Compute the number of known low bits of postOffset. If this block
100 /// contains inline asm, the number of known bits drops to the
101 /// instruction alignment. An aligned terminator may increase the number
102 /// of know bits.
103 /// If LogAlign is given, also consider the alignment of the next block.
Guillaume Chatelet18f805a2019-09-27 12:54:21 +0000104 unsigned postKnownBits(Align Align = Align::None()) const {
Guillaume Chateletd4c46712019-09-18 15:49:49 +0000105 return std::max(Log2(std::max(PostAlign, Align)), internalKnownBits());
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +0000106 }
107};
108
Sam Parker966f4e82019-06-17 08:49:09 +0000109class ARMBasicBlockUtils {
110
111private:
112 MachineFunction &MF;
113 bool isThumb = false;
114 const ARMBaseInstrInfo *TII = nullptr;
115 SmallVector<BasicBlockInfo, 8> BBInfo;
116
117public:
118 ARMBasicBlockUtils(MachineFunction &MF) : MF(MF) {
119 TII =
120 static_cast<const ARMBaseInstrInfo*>(MF.getSubtarget().getInstrInfo());
121 isThumb = MF.getInfo<ARMFunctionInfo>()->isThumbFunction();
122 }
123
124 void computeAllBlockSizes() {
125 BBInfo.resize(MF.getNumBlockIDs());
126 for (MachineBasicBlock &MBB : MF)
127 computeBlockSize(&MBB);
128 }
129
130 void computeBlockSize(MachineBasicBlock *MBB);
131
132 unsigned getOffsetOf(MachineInstr *MI) const;
133
Sam Parker08b4a8d2019-07-11 09:56:15 +0000134 unsigned getOffsetOf(MachineBasicBlock *MBB) const {
135 return BBInfo[MBB->getNumber()].Offset;
136 }
137
Sam Parker966f4e82019-06-17 08:49:09 +0000138 void adjustBBOffsetsAfter(MachineBasicBlock *MBB);
139
140 void adjustBBSize(MachineBasicBlock *MBB, int Size) {
141 BBInfo[MBB->getNumber()].Size += Size;
142 }
143
144 bool isBBInRange(MachineInstr *MI, MachineBasicBlock *DestBB,
145 unsigned MaxDisp) const;
146
147 void insert(unsigned BBNum, BasicBlockInfo BBI) {
148 BBInfo.insert(BBInfo.begin() + BBNum, BBI);
149 }
150
151 void clear() { BBInfo.clear(); }
152
153 BBInfoVector &getBBInfo() { return BBInfo; }
154
155};
156
Sjoerd Meijer5c0ef832016-07-22 08:39:12 +0000157} // end namespace llvm
158
Eugene Zelenkoe6cf4372017-01-26 23:40:06 +0000159#endif // LLVM_LIB_TARGET_ARM_ARMBASICBLOCKINFO_H