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Alex Bradbury89718422017-10-19 21:37:38 +00001//===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Alex Bradbury89718422017-10-19 21:37:38 +00006//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the RISCV specific subclass of TargetSubtargetInfo.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
14#define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
15
16#include "RISCVFrameLowering.h"
17#include "RISCVISelLowering.h"
18#include "RISCVInstrInfo.h"
Alex Bradburyfea49572019-03-09 09:28:06 +000019#include "Utils/RISCVBaseInfo.h"
Daniel Sandersa16bd4f2019-08-20 22:53:24 +000020#include "llvm/CodeGen/GlobalISel/CallLowering.h"
21#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
22#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
23#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
Alex Bradbury89718422017-10-19 21:37:38 +000024#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
David Blaikieb3bde2e2017-11-17 01:07:10 +000025#include "llvm/CodeGen/TargetSubtargetInfo.h"
Alex Bradbury89718422017-10-19 21:37:38 +000026#include "llvm/IR/DataLayout.h"
27#include "llvm/Target/TargetMachine.h"
Alex Bradbury89718422017-10-19 21:37:38 +000028
29#define GET_SUBTARGETINFO_HEADER
30#include "RISCVGenSubtargetInfo.inc"
31
32namespace llvm {
33class StringRef;
34
35class RISCVSubtarget : public RISCVGenSubtargetInfo {
36 virtual void anchor();
Alex Bradbury8c345c52017-11-09 15:00:03 +000037 bool HasStdExtM = false;
38 bool HasStdExtA = false;
Alex Bradbury0d6cf902017-12-07 10:26:05 +000039 bool HasStdExtF = false;
Alex Bradbury7bc2a952017-12-07 10:46:23 +000040 bool HasStdExtD = false;
Alex Bradbury9f6aec42017-12-07 12:50:32 +000041 bool HasStdExtC = false;
Alex Bradbury89718422017-10-19 21:37:38 +000042 bool HasRV64 = false;
Alex Bradburydab1f6f2019-03-22 11:21:40 +000043 bool IsRV32E = false;
Shiva Chen39694252018-05-15 01:28:50 +000044 bool EnableLinkerRelax = false;
Luis Marquesc3bf3d12019-08-21 14:00:58 +000045 bool EnableRVCHintInstrs = false;
Alex Bradbury89718422017-10-19 21:37:38 +000046 unsigned XLen = 32;
47 MVT XLenVT = MVT::i32;
Alex Bradburyfea49572019-03-09 09:28:06 +000048 RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
Simon Cookaed9d6d2019-10-22 21:25:01 +010049 BitVector UserReservedRegister;
Alex Bradbury89718422017-10-19 21:37:38 +000050 RISCVFrameLowering FrameLowering;
51 RISCVInstrInfo InstrInfo;
52 RISCVRegisterInfo RegInfo;
53 RISCVTargetLowering TLInfo;
54 SelectionDAGTargetInfo TSInfo;
55
56 /// Initializes using the passed in CPU and feature strings so that we can
57 /// use initializer lists for subtarget initialization.
Alex Bradburyfea49572019-03-09 09:28:06 +000058 RISCVSubtarget &initializeSubtargetDependencies(const Triple &TT,
59 StringRef CPU, StringRef FS,
60 StringRef ABIName);
Alex Bradbury89718422017-10-19 21:37:38 +000061
62public:
63 // Initializes the data members to match that of the specified triple.
Alex Bradbury6aae2162019-02-19 14:42:00 +000064 RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
Alex Bradburyfea49572019-03-09 09:28:06 +000065 StringRef ABIName, const TargetMachine &TM);
Alex Bradbury89718422017-10-19 21:37:38 +000066
67 // Parses features string setting specified subtarget options. The
68 // definition of this function is auto-generated by tblgen.
69 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
70
71 const RISCVFrameLowering *getFrameLowering() const override {
72 return &FrameLowering;
73 }
74 const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; }
75 const RISCVRegisterInfo *getRegisterInfo() const override {
76 return &RegInfo;
77 }
78 const RISCVTargetLowering *getTargetLowering() const override {
79 return &TLInfo;
80 }
81 const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
82 return &TSInfo;
83 }
Luis Marques3d0fbaf2019-09-17 11:15:35 +000084 bool enableMachineScheduler() const override { return true; }
Alex Bradburya47514c2017-11-09 14:46:30 +000085 bool hasStdExtM() const { return HasStdExtM; }
Alex Bradbury8c345c52017-11-09 15:00:03 +000086 bool hasStdExtA() const { return HasStdExtA; }
Alex Bradbury0d6cf902017-12-07 10:26:05 +000087 bool hasStdExtF() const { return HasStdExtF; }
Alex Bradbury7bc2a952017-12-07 10:46:23 +000088 bool hasStdExtD() const { return HasStdExtD; }
Alex Bradbury9f6aec42017-12-07 12:50:32 +000089 bool hasStdExtC() const { return HasStdExtC; }
Alex Bradbury89718422017-10-19 21:37:38 +000090 bool is64Bit() const { return HasRV64; }
Alex Bradburydab1f6f2019-03-22 11:21:40 +000091 bool isRV32E() const { return IsRV32E; }
Shiva Chen39694252018-05-15 01:28:50 +000092 bool enableLinkerRelax() const { return EnableLinkerRelax; }
Luis Marquesc3bf3d12019-08-21 14:00:58 +000093 bool enableRVCHintInstrs() const { return EnableRVCHintInstrs; }
Alex Bradbury89718422017-10-19 21:37:38 +000094 MVT getXLenVT() const { return XLenVT; }
95 unsigned getXLen() const { return XLen; }
Alex Bradburyfea49572019-03-09 09:28:06 +000096 RISCVABI::ABI getTargetABI() const { return TargetABI; }
Simon Cookaed9d6d2019-10-22 21:25:01 +010097 bool isRegisterReservedByUser(Register i) const {
98 assert(i < RISCV::NUM_TARGET_REGS && "Register out of range");
99 return UserReservedRegister[i];
100 }
Daniel Sandersa16bd4f2019-08-20 22:53:24 +0000101
102protected:
103 // GlobalISel related APIs.
104 std::unique_ptr<CallLowering> CallLoweringInfo;
105 std::unique_ptr<InstructionSelector> InstSelector;
106 std::unique_ptr<LegalizerInfo> Legalizer;
107 std::unique_ptr<RegisterBankInfo> RegBankInfo;
108
109public:
110 const CallLowering *getCallLowering() const override;
111 InstructionSelector *getInstructionSelector() const override;
112 const LegalizerInfo *getLegalizerInfo() const override;
113 const RegisterBankInfo *getRegBankInfo() const override;
Alex Bradbury89718422017-10-19 21:37:38 +0000114};
115} // End llvm namespace
116
117#endif