blob: 981071a0181e7e6b6a9dfadfd4ee66063d7fa8d0 [file] [log] [blame]
Krzysztof Parzyszekf7f70682016-06-22 20:08:27 +00001; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; CHECK-DAG: r[[BASE:[0-9]+]] += add
Krzysztof Parzyszeka72fad92017-02-10 15:33:13 +00004; CHECK-DAG: r[[IDX0:[0-9]+]] = add(r2,#5)
5; CHECK-DAG: r[[IDX1:[0-9]+]] = add(r2,#6)
6; CHECK-DAG: memw(r0+r[[IDX0]]<<#2) = r3
7; CHECK-DAG: memw(r0+r[[IDX1]]<<#2) = r3
8; CHECK-DAG: memw(r[[BASE]]+r[[IDX0]]<<#2) = r[[IDX0]]
9; CHECK-DAG: memw(r[[BASE]]+r[[IDX1]]<<#2) = r[[IDX0]]
Krzysztof Parzyszekf7f70682016-06-22 20:08:27 +000010
11target triple = "hexagon"
12
13@G = external global i32, align 4
14
15; Function Attrs: norecurse nounwind
16define void @fred(i32* nocapture %A, [50 x i32]* nocapture %B, i32 %N, i32 %M) #0 {
17entry:
18 %add = add nsw i32 %N, 5
19 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %add
20 store i32 %M, i32* %arrayidx, align 4, !tbaa !1
21 %add2 = add nsw i32 %N, 6
22 %arrayidx3 = getelementptr inbounds i32, i32* %A, i32 %add2
23 store i32 %M, i32* %arrayidx3, align 4, !tbaa !1
24 %add4 = add nsw i32 %N, 35
25 %arrayidx5 = getelementptr inbounds i32, i32* %A, i32 %add4
26 store i32 %add, i32* %arrayidx5, align 4, !tbaa !1
27 %arrayidx8 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add, i32 %add
28 store i32 %add, i32* %arrayidx8, align 4, !tbaa !1
29 %inc = add nsw i32 %N, 6
30 %arrayidx8.1 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add, i32 %inc
31 store i32 %add, i32* %arrayidx8.1, align 4, !tbaa !1
32 %sub = add nsw i32 %N, 4
33 %arrayidx10 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add, i32 %sub
34 %0 = load i32, i32* %arrayidx10, align 4, !tbaa !1
35 %add11 = add nsw i32 %0, 1
36 store i32 %add11, i32* %arrayidx10, align 4, !tbaa !1
37 %1 = load i32, i32* %arrayidx, align 4, !tbaa !1
38 %add13 = add nsw i32 %N, 25
39 %arrayidx15 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add13, i32 %add
40 store i32 %1, i32* %arrayidx15, align 4, !tbaa !1
41 store i32 5, i32* @G, align 4, !tbaa !1
42 ret void
43}
44
45attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,-hvx-double" }
46
47!1 = !{!2, !2, i64 0}
48!2 = !{!"int", !3, i64 0}
49!3 = !{!"omnipotent char", !4, i64 0}
50!4 = !{!"Simple C/C++ TBAA"}