| Reid Kleckner | 5fe3f00 | 2019-11-14 10:19:36 -0800 | [diff] [blame] | 1 | //===----- PostRAHazardRecognizer.cpp - hazard recognizer -----------------===// | 
|  | 2 | // | 
|  | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | 
|  | 4 | // See https://llvm.org/LICENSE.txt for license information. | 
|  | 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | 
|  | 6 | // | 
|  | 7 | //===----------------------------------------------------------------------===// | 
|  | 8 | // | 
|  | 9 | /// \file | 
|  | 10 | /// This runs the hazard recognizer and emits noops when necessary.  This | 
|  | 11 | /// gives targets a way to run the hazard recognizer without running one of | 
|  | 12 | /// the schedulers.  Example use cases for this pass would be: | 
|  | 13 | /// | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 14 | /// - Targets that need the hazard recognizer to be run at -O0. | 
|  | 15 | /// - Targets that want to guarantee that hazards at the beginning of | 
|  | 16 | ///   scheduling regions are handled correctly.  The post-RA scheduler is | 
|  | 17 | ///   a top-down scheduler, but when there are multiple scheduling regions | 
|  | 18 | ///   in a basic block, it visits the regions in bottom-up order.  This | 
|  | 19 | ///   makes it impossible for the scheduler to gauranttee it can correctly | 
|  | 20 | ///   handle hazards at the beginning of scheduling regions. | 
|  | 21 | /// | 
|  | 22 | /// This pass traverses all the instructions in a program in top-down order. | 
|  | 23 | /// In contrast to the instruction scheduling passes, this pass never resets | 
|  | 24 | /// the hazard recognizer to ensure it can correctly handles noop hazards at | 
| Hiroshi Inoue | e9dea6e | 2017-07-13 06:48:39 +0000 | [diff] [blame] | 25 | /// the beginning of blocks. | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 26 | // | 
|  | 27 | //===----------------------------------------------------------------------===// | 
|  | 28 |  | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 29 | #include "llvm/ADT/Statistic.h" | 
|  | 30 | #include "llvm/CodeGen/MachineFunctionPass.h" | 
| Chandler Carruth | 6bda14b | 2017-06-06 11:49:48 +0000 | [diff] [blame] | 31 | #include "llvm/CodeGen/Passes.h" | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 32 | #include "llvm/CodeGen/ScheduleHazardRecognizer.h" | 
| David Blaikie | 3f833ed | 2017-11-08 01:01:31 +0000 | [diff] [blame] | 33 | #include "llvm/CodeGen/TargetInstrInfo.h" | 
| David Blaikie | b3bde2e | 2017-11-17 01:07:10 +0000 | [diff] [blame] | 34 | #include "llvm/CodeGen/TargetSubtargetInfo.h" | 
| Reid Kleckner | 05da2fe | 2019-11-13 13:15:01 -0800 | [diff] [blame] | 35 | #include "llvm/InitializePasses.h" | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 36 | #include "llvm/Support/Debug.h" | 
|  | 37 | #include "llvm/Support/ErrorHandling.h" | 
|  | 38 | #include "llvm/Support/raw_ostream.h" | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 39 | using namespace llvm; | 
|  | 40 |  | 
|  | 41 | #define DEBUG_TYPE "post-RA-hazard-rec" | 
|  | 42 |  | 
|  | 43 | STATISTIC(NumNoops, "Number of noops inserted"); | 
|  | 44 |  | 
|  | 45 | namespace { | 
|  | 46 | class PostRAHazardRecognizer : public MachineFunctionPass { | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 47 |  | 
|  | 48 | public: | 
|  | 49 | static char ID; | 
|  | 50 | PostRAHazardRecognizer() : MachineFunctionPass(ID) {} | 
|  | 51 |  | 
|  | 52 | void getAnalysisUsage(AnalysisUsage &AU) const override { | 
|  | 53 | AU.setPreservesCFG(); | 
|  | 54 | MachineFunctionPass::getAnalysisUsage(AU); | 
|  | 55 | } | 
|  | 56 |  | 
|  | 57 | bool runOnMachineFunction(MachineFunction &Fn) override; | 
|  | 58 |  | 
|  | 59 | }; | 
|  | 60 | char PostRAHazardRecognizer::ID = 0; | 
|  | 61 |  | 
|  | 62 | } | 
|  | 63 |  | 
|  | 64 | char &llvm::PostRAHazardRecognizerID = PostRAHazardRecognizer::ID; | 
|  | 65 |  | 
|  | 66 | INITIALIZE_PASS(PostRAHazardRecognizer, DEBUG_TYPE, | 
|  | 67 | "Post RA hazard recognizer", false, false) | 
|  | 68 |  | 
|  | 69 | bool PostRAHazardRecognizer::runOnMachineFunction(MachineFunction &Fn) { | 
|  | 70 | const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo(); | 
|  | 71 | std::unique_ptr<ScheduleHazardRecognizer> HazardRec( | 
|  | 72 | TII->CreateTargetPostRAHazardRecognizer(Fn)); | 
|  | 73 |  | 
|  | 74 | // Return if the target has not implemented a hazard recognizer. | 
|  | 75 | if (!HazardRec.get()) | 
|  | 76 | return false; | 
|  | 77 |  | 
|  | 78 | // Loop over all of the basic blocks | 
|  | 79 | for (auto &MBB : Fn) { | 
|  | 80 | // We do not call HazardRec->reset() here to make sure we are handling noop | 
|  | 81 | // hazards at the start of basic blocks. | 
| Duncan P. N. Exon Smith | 286d948 | 2016-07-01 00:50:29 +0000 | [diff] [blame] | 82 | for (MachineInstr &MI : MBB) { | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 83 | // If we need to emit noops prior to this instruction, then do so. | 
| Duncan P. N. Exon Smith | 286d948 | 2016-07-01 00:50:29 +0000 | [diff] [blame] | 84 | unsigned NumPreNoops = HazardRec->PreEmitNoops(&MI); | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 85 | for (unsigned i = 0; i != NumPreNoops; ++i) { | 
|  | 86 | HazardRec->EmitNoop(); | 
| Duncan P. N. Exon Smith | 286d948 | 2016-07-01 00:50:29 +0000 | [diff] [blame] | 87 | TII->insertNoop(MBB, MachineBasicBlock::iterator(MI)); | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 88 | ++NumNoops; | 
|  | 89 | } | 
|  | 90 |  | 
| Duncan P. N. Exon Smith | 286d948 | 2016-07-01 00:50:29 +0000 | [diff] [blame] | 91 | HazardRec->EmitInstruction(&MI); | 
| Tom Stellard | ee34680 | 2016-04-22 14:43:50 +0000 | [diff] [blame] | 92 | if (HazardRec->atIssueLimit()) { | 
|  | 93 | HazardRec->AdvanceCycle(); | 
|  | 94 | } | 
|  | 95 | } | 
|  | 96 | } | 
|  | 97 | return true; | 
|  | 98 | } |