Tom Stellard | 49f8bfd | 2015-01-06 18:00:21 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s |
Marek Olsak | 7517077 | 2015-01-27 17:27:15 +0000 | [diff] [blame] | 2 | ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s |
Matt Arsenault | 37d42ec | 2013-09-06 00:18:43 +0000 | [diff] [blame] | 3 | |
| 4 | ; Test that codegenprepare understands address space sizes |
| 5 | |
| 6 | %struct.foo = type { [3 x float], [3 x float] } |
| 7 | |
Matt Arsenault | 99ed789 | 2014-03-19 22:19:49 +0000 | [diff] [blame] | 8 | ; FIXME: Extra V_MOV from SGPR to VGPR for second read. The address is |
| 9 | ; already in a VGPR after the first read. |
| 10 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame] | 11 | ; CHECK-LABEL: {{^}}do_as_ptr_calcs: |
Tom Stellard | 326d6ec | 2014-11-05 14:50:53 +0000 | [diff] [blame] | 12 | ; CHECK: s_load_dword [[SREG1:s[0-9]+]], |
Tom Stellard | 83f0bce | 2015-01-29 16:55:25 +0000 | [diff] [blame] | 13 | ; CHECK: v_mov_b32_e32 [[VREG2:v[0-9]+]], [[SREG1]] |
Tom Stellard | 326d6ec | 2014-11-05 14:50:53 +0000 | [diff] [blame] | 14 | ; CHECK: v_mov_b32_e32 [[VREG1:v[0-9]+]], [[SREG1]] |
| 15 | ; CHECK-DAG: ds_read_b32 v{{[0-9]+}}, [[VREG1]] offset:12 |
Tom Stellard | 83f0bce | 2015-01-29 16:55:25 +0000 | [diff] [blame] | 16 | ; CHECK-DAG: ds_read_b32 v{{[0-9]+}}, [[VREG2]] offset:20 |
Matt Arsenault | 37d42ec | 2013-09-06 00:18:43 +0000 | [diff] [blame] | 17 | define void @do_as_ptr_calcs(%struct.foo addrspace(3)* nocapture %ptr) nounwind { |
| 18 | entry: |
David Blaikie | 79e6c74 | 2015-02-27 19:29:02 +0000 | [diff] [blame] | 19 | %x = getelementptr inbounds %struct.foo, %struct.foo addrspace(3)* %ptr, i32 0, i32 1, i32 0 |
| 20 | %y = getelementptr inbounds %struct.foo, %struct.foo addrspace(3)* %ptr, i32 0, i32 1, i32 2 |
Matt Arsenault | 37d42ec | 2013-09-06 00:18:43 +0000 | [diff] [blame] | 21 | br label %bb32 |
| 22 | |
| 23 | bb32: |
David Blaikie | a79ac14 | 2015-02-27 21:17:42 +0000 | [diff] [blame^] | 24 | %a = load float, float addrspace(3)* %x, align 4 |
| 25 | %b = load float, float addrspace(3)* %y, align 4 |
Matt Arsenault | 37d42ec | 2013-09-06 00:18:43 +0000 | [diff] [blame] | 26 | %cmp = fcmp one float %a, %b |
| 27 | br i1 %cmp, label %bb34, label %bb33 |
| 28 | |
| 29 | bb33: |
| 30 | unreachable |
| 31 | |
| 32 | bb34: |
| 33 | unreachable |
| 34 | } |
| 35 | |
| 36 | |