blob: 8830e82736619a6942b3c292999c28ffdeb990ef [file] [log] [blame]
Tom Stellard49f8bfd2015-01-06 18:00:21 +00001; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Marek Olsak75170772015-01-27 17:27:15 +00002; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Matt Arsenault13623d02014-08-15 18:42:18 +00003
4; FIXME: Check something here. Currently it seems fabs + fneg aren't
5; into 2 modifiers, although theoretically that should work.
6
Tom Stellard79243d92014-10-01 17:15:17 +00007; FUNC-LABEL: {{^}}fneg_fabs_fadd_f64:
Matt Arsenault20711b72015-02-20 22:10:45 +00008; SI: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|v{{\[[0-9]+:[0-9]+\]}}|
Matt Arsenault13623d02014-08-15 18:42:18 +00009define void @fneg_fabs_fadd_f64(double addrspace(1)* %out, double %x, double %y) {
10 %fabs = call double @llvm.fabs.f64(double %x)
11 %fsub = fsub double -0.000000e+00, %fabs
12 %fadd = fadd double %y, %fsub
13 store double %fadd, double addrspace(1)* %out, align 8
14 ret void
15}
16
17define void @v_fneg_fabs_fadd_f64(double addrspace(1)* %out, double addrspace(1)* %xptr, double addrspace(1)* %yptr) {
David Blaikiea79ac142015-02-27 21:17:42 +000018 %x = load double, double addrspace(1)* %xptr, align 8
19 %y = load double, double addrspace(1)* %xptr, align 8
Matt Arsenault13623d02014-08-15 18:42:18 +000020 %fabs = call double @llvm.fabs.f64(double %x)
21 %fsub = fsub double -0.000000e+00, %fabs
22 %fadd = fadd double %y, %fsub
23 store double %fadd, double addrspace(1)* %out, align 8
24 ret void
25}
26
Tom Stellard79243d92014-10-01 17:15:17 +000027; FUNC-LABEL: {{^}}fneg_fabs_fmul_f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000028; SI: v_mul_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|{{v\[[0-9]+:[0-9]+\]}}|
Matt Arsenault13623d02014-08-15 18:42:18 +000029define void @fneg_fabs_fmul_f64(double addrspace(1)* %out, double %x, double %y) {
30 %fabs = call double @llvm.fabs.f64(double %x)
31 %fsub = fsub double -0.000000e+00, %fabs
32 %fmul = fmul double %y, %fsub
33 store double %fmul, double addrspace(1)* %out, align 8
34 ret void
35}
36
Tom Stellard79243d92014-10-01 17:15:17 +000037; FUNC-LABEL: {{^}}fneg_fabs_free_f64:
Matt Arsenault13623d02014-08-15 18:42:18 +000038define void @fneg_fabs_free_f64(double addrspace(1)* %out, i64 %in) {
39 %bc = bitcast i64 %in to double
40 %fabs = call double @llvm.fabs.f64(double %bc)
41 %fsub = fsub double -0.000000e+00, %fabs
42 store double %fsub, double addrspace(1)* %out
43 ret void
44}
45
Tom Stellard79243d92014-10-01 17:15:17 +000046; FUNC-LABEL: {{^}}fneg_fabs_fn_free_f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000047; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
48; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
Matt Arsenault13623d02014-08-15 18:42:18 +000049define void @fneg_fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) {
50 %bc = bitcast i64 %in to double
51 %fabs = call double @fabs(double %bc)
52 %fsub = fsub double -0.000000e+00, %fabs
53 store double %fsub, double addrspace(1)* %out
54 ret void
55}
56
Tom Stellard79243d92014-10-01 17:15:17 +000057; FUNC-LABEL: {{^}}fneg_fabs_f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000058; SI: s_load_dwordx2 s{{\[}}[[LO_X:[0-9]+]]:[[HI_X:[0-9]+]]{{\]}}
Tom Stellard83f0bce2015-01-29 16:55:25 +000059; SI: s_load_dwordx2
Tom Stellard326d6ec2014-11-05 14:50:53 +000060; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
61; SI-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]]
62; SI-DAG: v_mov_b32_e32 v[[LO_V:[0-9]+]], s[[LO_X]]
63; SI: buffer_store_dwordx2 v{{\[}}[[LO_V]]:[[HI_V]]{{\]}}
Matt Arsenault13623d02014-08-15 18:42:18 +000064define void @fneg_fabs_f64(double addrspace(1)* %out, double %in) {
65 %fabs = call double @llvm.fabs.f64(double %in)
66 %fsub = fsub double -0.000000e+00, %fabs
67 store double %fsub, double addrspace(1)* %out, align 8
68 ret void
69}
70
Tom Stellard79243d92014-10-01 17:15:17 +000071; FUNC-LABEL: {{^}}fneg_fabs_v2f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000072; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
Matt Arsenaultfabf5452014-08-15 18:42:22 +000073; SI-NOT: 0x80000000
Tom Stellard326d6ec2014-11-05 14:50:53 +000074; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
75; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
Matt Arsenault13623d02014-08-15 18:42:18 +000076define void @fneg_fabs_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
77 %fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %in)
78 %fsub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %fabs
79 store <2 x double> %fsub, <2 x double> addrspace(1)* %out
80 ret void
81}
82
Tom Stellard79243d92014-10-01 17:15:17 +000083; FUNC-LABEL: {{^}}fneg_fabs_v4f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000084; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
Matt Arsenaultfabf5452014-08-15 18:42:22 +000085; SI-NOT: 0x80000000
Tom Stellard326d6ec2014-11-05 14:50:53 +000086; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
87; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
88; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
89; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
Matt Arsenault13623d02014-08-15 18:42:18 +000090define void @fneg_fabs_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
91 %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)
92 %fsub = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %fabs
93 store <4 x double> %fsub, <4 x double> addrspace(1)* %out
94 ret void
95}
96
97declare double @fabs(double) readnone
98declare double @llvm.fabs.f64(double) readnone
99declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone
100declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone