Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / aa9ca691cde9d650ec92049ca851a311baf6d15c / . / llvm / test / CodeGen / ARM / 2012-08-09-neon-extload.ll
blob: 285a431a6ecf67f95cd8e7d455433eb1b04fd829 [file] [log] [blame]
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]1; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s
2
3@var_v2i8 = global <2 x i8> zeroinitializer
4@var_v4i8 = global <4 x i8> zeroinitializer
5
6@var_v2i16 = global <2 x i16> zeroinitializer
7@var_v4i16 = global <4 x i16> zeroinitializer
8
9@var_v2i32 = global <2 x i32> zeroinitializer
10@var_v4i32 = global <4 x i32> zeroinitializer
11
12@var_v2i64 = global <2 x i64> zeroinitializer
13
14define void @test_v2i8tov2i32() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]15; CHECK-LABEL: test_v2i8tov2i32:
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]16
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]17 %i8val = load <2 x i8>, <2 x i8>* @var_v2i8
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]18
19 %i32val = sext <2 x i8> %i8val to <2 x i32>
20 store <2 x i32> %i32val, <2 x i32>* @var_v2i32
Kristof Beyls0ba797e2013-02-22 10:01:33 +0000[diff] [blame]21; CHECK: vld1.16 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:16]
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]22; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
23; CHECK: vmovl.s16 {{q[0-9]+}}, {{d[0-9]+}}
24
25 ret void
26}
27
28define void @test_v2i8tov2i64() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]29; CHECK-LABEL: test_v2i8tov2i64:
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]30
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]31 %i8val = load <2 x i8>, <2 x i8>* @var_v2i8
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]32
33 %i64val = sext <2 x i8> %i8val to <2 x i64>
34 store <2 x i64> %i64val, <2 x i64>* @var_v2i64
Kristof Beyls0ba797e2013-02-22 10:01:33 +0000[diff] [blame]35; CHECK: vld1.16 {d{{[0-9]+}}[0]}, [{{r[0-9]+}}:16]
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]36; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
37; CHECK: vmovl.s16 {{q[0-9]+}}, {{d[0-9]+}}
38; CHECK: vmovl.s32 {{q[0-9]+}}, {{d[0-9]+}}
39
40; %i64val = sext <2 x i8> %i8val to <2 x i64>
41; store <2 x i64> %i64val, <2 x i64>* @var_v2i64
42
43 ret void
44}
45
46define void @test_v4i8tov4i16() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]47; CHECK-LABEL: test_v4i8tov4i16:
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]48
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]49 %i8val = load <4 x i8>, <4 x i8>* @var_v4i8
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]50
51 %i16val = sext <4 x i8> %i8val to <4 x i16>
52 store <4 x i16> %i16val, <4 x i16>* @var_v4i16
Kristof Beyls0ba797e2013-02-22 10:01:33 +0000[diff] [blame]53; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]54; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
55; CHECK-NOT: vmovl.s16
56
57 ret void
58; CHECK: bx lr
59}
60
61define void @test_v4i8tov4i32() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]62; CHECK-LABEL: test_v4i8tov4i32:
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]63
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]64 %i8val = load <4 x i8>, <4 x i8>* @var_v4i8
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]65
66 %i16val = sext <4 x i8> %i8val to <4 x i32>
67 store <4 x i32> %i16val, <4 x i32>* @var_v4i32
Kristof Beyls0ba797e2013-02-22 10:01:33 +0000[diff] [blame]68; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]69; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
70; CHECK: vmovl.s16 {{q[0-9]+}}, {{d[0-9]+}}
71
72 ret void
73}
74
75define void @test_v2i16tov2i32() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]76; CHECK-LABEL: test_v2i16tov2i32:
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]77
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]78 %i16val = load <2 x i16>, <2 x i16>* @var_v2i16
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]79
80 %i32val = sext <2 x i16> %i16val to <2 x i32>
81 store <2 x i32> %i32val, <2 x i32>* @var_v2i32
Kristof Beyls0ba797e2013-02-22 10:01:33 +0000[diff] [blame]82; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]83; CHECK: vmovl.s16 {{q[0-9]+}}, d[[LOAD]]
84; CHECK-NOT: vmovl
85
86 ret void
87; CHECK: bx lr
88}
89
90define void @test_v2i16tov2i64() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]91; CHECK-LABEL: test_v2i16tov2i64:
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]92
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]93 %i16val = load <2 x i16>, <2 x i16>* @var_v2i16
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]94
95 %i64val = sext <2 x i16> %i16val to <2 x i64>
96 store <2 x i64> %i64val, <2 x i64>* @var_v2i64
Kristof Beyls0ba797e2013-02-22 10:01:33 +0000[diff] [blame]97; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
Tim Northoverb4abb842012-08-13 10:38:45 +0000[diff] [blame]98; CHECK: vmovl.s16 {{q[0-9]+}}, d[[LOAD]]
99; CHECK: vmovl.s32 {{q[0-9]+}}, d[[LOAD]]
100
101 ret void
102}