blob: 4969fabfd9b3c9b9508b0a2b311cf821726b1260 [file] [log] [blame]
Tim Northoverff168c62017-04-19 18:07:54 +00001; RUN: llc -mtriple=thumbv7k-apple-watchos2.0 -arm-atomic-cfg-tidy=0 -o - %s | FileCheck %s
2
3@tls_var = thread_local global i32 0
4
5; r9 and r12 can be live across the asm, but those get clobbered by the TLS
6; access (in a different BB to order it).
7define i32 @test_regs_preserved(i32* %ptr1, i32* %ptr2, i1 %tst1) {
8; CHECK-LABEL: test_regs_preserved:
9; CHECK: str {{.*}}, [sp
10; CHECK: mov {{.*}}, r12
11entry:
12 call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r10},~{r11},~{r13},~{lr}"()
13 br i1 %tst1, label %get_tls, label %done
14
15get_tls:
16 %val = load i32, i32* @tls_var
17 br label %done
18
19done:
20 %res = phi i32 [%val, %get_tls], [0, %entry]
21 store i32 42, i32* %ptr1
22 store i32 42, i32* %ptr2
23 ret i32 %res
24}