Roger Ferrer Ibanez | 5ea0f25 | 2017-12-11 12:13:45 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -mtriple thumbv7 | FileCheck %s |
| 2 | |
| 3 | ; ModuleID = 'bugpoint-reduced-simplified.bc' |
| 4 | define hidden void @bn_mul_comba8(i32* nocapture %r, i32* nocapture readonly %a, i32* nocapture readonly %b) local_unnamed_addr { |
| 5 | entry: |
| 6 | ; This test is actually checking that no cycle is introduced but at least we |
| 7 | ; want to see a couple of umull and one umlal in the output |
| 8 | ; CHECK: umull |
| 9 | ; CHECK: umull |
| 10 | ; CHECK: umlal |
| 11 | %0 = load i32, i32* %a, align 4 |
| 12 | %conv = zext i32 %0 to i64 |
| 13 | %1 = load i32, i32* %b, align 4 |
| 14 | %conv2 = zext i32 %1 to i64 |
| 15 | %mul = mul nuw i64 %conv2, %conv |
| 16 | %shr = lshr i64 %mul, 32 |
| 17 | %2 = load i32, i32* %a, align 4 |
| 18 | %conv13 = zext i32 %2 to i64 |
| 19 | %3 = load i32, i32* undef, align 4 |
| 20 | %conv15 = zext i32 %3 to i64 |
| 21 | %mul16 = mul nuw i64 %conv15, %conv13 |
| 22 | %add18 = add i64 %mul16, %shr |
| 23 | %shr20 = lshr i64 %add18, 32 |
| 24 | %conv21 = trunc i64 %shr20 to i32 |
| 25 | %4 = load i32, i32* undef, align 4 |
| 26 | %conv34 = zext i32 %4 to i64 |
| 27 | %5 = load i32, i32* %b, align 4 |
| 28 | %conv36 = zext i32 %5 to i64 |
| 29 | %mul37 = mul nuw i64 %conv36, %conv34 |
| 30 | %conv38 = and i64 %add18, 4294967295 |
| 31 | %add39 = add i64 %mul37, %conv38 |
| 32 | %shr41 = lshr i64 %add39, 32 |
| 33 | %conv42 = trunc i64 %shr41 to i32 |
| 34 | %add43 = add i32 %conv42, %conv21 |
| 35 | %cmp44 = icmp ult i32 %add43, %conv42 |
| 36 | %c1.1 = zext i1 %cmp44 to i32 |
| 37 | %add65 = add i32 0, %c1.1 |
| 38 | %add86 = add i32 %add65, 0 |
| 39 | %add107 = add i32 %add86, 0 |
| 40 | %conv124 = zext i32 %add107 to i64 |
| 41 | %add125 = add i64 0, %conv124 |
| 42 | %conv145 = and i64 %add125, 4294967295 |
| 43 | %add146 = add i64 %conv145, 0 |
| 44 | %conv166 = and i64 %add146, 4294967295 |
| 45 | %add167 = add i64 %conv166, 0 |
| 46 | %conv187 = and i64 %add167, 4294967295 |
| 47 | %add188 = add i64 %conv187, 0 |
| 48 | %conv189 = trunc i64 %add188 to i32 |
| 49 | %arrayidx200 = getelementptr inbounds i32, i32* %r, i32 3 |
| 50 | store i32 %conv189, i32* %arrayidx200, align 4 |
| 51 | ret void |
| 52 | } |
| 53 | |