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gerrit-public.fairphone.software / toolchain / llvm-project / aa9ca691cde9d650ec92049ca851a311baf6d15c / . / llvm / test / CodeGen / PowerPC / testComparesigess.ll
blob: 231a26c916db0c8d2358324f89b523da798a4770 [file] [log] [blame]
Nemanja Ivanovicdb7e7702017-11-30 13:39:10 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
Nemanja Ivanovicdb7e7702017-11-30 13:39:10 +0000[diff] [blame]3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
Nemanja Ivanovicdb7e7702017-11-30 13:39:10 +0000[diff] [blame]6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]8@glob = common local_unnamed_addr global i16 0, align 2
9
10define signext i32 @test_igess(i16 signext %a, i16 signext %b) {
11; CHECK-LABEL: test_igess:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]12; CHECK: # %bb.0: # %entry
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]13; CHECK-NEXT: sub r3, r3, r4
14; CHECK-NEXT: rldicl r3, r3, 1, 63
15; CHECK-NEXT: xori r3, r3, 1
16; CHECK-NEXT: blr
17entry:
18 %cmp = icmp sge i16 %a, %b
19 %conv2 = zext i1 %cmp to i32
20 ret i32 %conv2
21}
22
23define signext i32 @test_igess_sext(i16 signext %a, i16 signext %b) {
24; CHECK-LABEL: test_igess_sext:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]25; CHECK: # %bb.0: # %entry
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]26; CHECK-NEXT: sub r3, r3, r4
27; CHECK-NEXT: rldicl r3, r3, 1, 63
28; CHECK-NEXT: addi r3, r3, -1
29; CHECK-NEXT: blr
30entry:
31 %cmp = icmp sge i16 %a, %b
32 %sub = sext i1 %cmp to i32
33 ret i32 %sub
34}
35
36define void @test_igess_store(i16 signext %a, i16 signext %b) {
37; CHECK-LABEL: test_igess_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]38; CHECK: # %bb.0: # %entry
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]39; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
40; CHECK-NEXT: sub r3, r3, r4
41; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
42; CHECK-NEXT: rldicl r3, r3, 1, 63
43; CHECK-NEXT: xori r3, r3, 1
44; CHECK-NEXT: sth r3, 0(r12)
45; CHECK-NEXT: blr
46entry:
47 %cmp = icmp sge i16 %a, %b
48 %conv3 = zext i1 %cmp to i16
49 store i16 %conv3, i16* @glob, align 2
50 ret void
51}
52
53define void @test_igess_sext_store(i16 signext %a, i16 signext %b) {
54; CHECK-LABEL: test_igess_sext_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]55; CHECK: # %bb.0: # %entry
Nemanja Ivanovicd6f93f52017-09-22 11:50:25 +0000[diff] [blame]56; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
57; CHECK-NEXT: sub r3, r3, r4
58; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
59; CHECK-NEXT: rldicl r3, r3, 1, 63
60; CHECK-NEXT: addi r3, r3, -1
61; CHECK-NEXT: sth r3, 0(r12)
62; CHECK-NEXT: blr
63entry:
64 %cmp = icmp sge i16 %a, %b
65 %conv3 = sext i1 %cmp to i16
66 store i16 %conv3, i16* @glob, align 2
67 ret void
68}