blob: 26ef304d1f522ebb01d8fa97f1c7baefc288896b [file] [log] [blame]
Tom Stellard94593ee2013-06-03 17:40:18 +00001; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
2; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s
3
4; R600-CHECK: @ngroups_x
Tom Stellardac00f9d2013-08-16 01:11:46 +00005; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +00006; R600-CHECK: MOV * [[VAL]], KC0[0].X
Tom Stellard94593ee2013-06-03 17:40:18 +00007; SI-CHECK: @ngroups_x
8; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 0
9; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
10; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
11define void @ngroups_x (i32 addrspace(1)* %out) {
12entry:
13 %0 = call i32 @llvm.r600.read.ngroups.x() #0
14 store i32 %0, i32 addrspace(1)* %out
15 ret void
16}
17
18; R600-CHECK: @ngroups_y
Tom Stellardac00f9d2013-08-16 01:11:46 +000019; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +000020; R600-CHECK: MOV * [[VAL]], KC0[0].Y
Tom Stellard94593ee2013-06-03 17:40:18 +000021; SI-CHECK: @ngroups_y
22; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 1
23; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
24; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
25define void @ngroups_y (i32 addrspace(1)* %out) {
26entry:
27 %0 = call i32 @llvm.r600.read.ngroups.y() #0
28 store i32 %0, i32 addrspace(1)* %out
29 ret void
30}
31
32; R600-CHECK: @ngroups_z
Tom Stellardac00f9d2013-08-16 01:11:46 +000033; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +000034; R600-CHECK: MOV * [[VAL]], KC0[0].Z
Tom Stellard94593ee2013-06-03 17:40:18 +000035; SI-CHECK: @ngroups_z
36; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 2
37; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
38; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
39define void @ngroups_z (i32 addrspace(1)* %out) {
40entry:
41 %0 = call i32 @llvm.r600.read.ngroups.z() #0
42 store i32 %0, i32 addrspace(1)* %out
43 ret void
44}
45
46; R600-CHECK: @global_size_x
Tom Stellardac00f9d2013-08-16 01:11:46 +000047; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +000048; R600-CHECK: MOV * [[VAL]], KC0[0].W
Tom Stellard94593ee2013-06-03 17:40:18 +000049; SI-CHECK: @global_size_x
50; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 3
51; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
52; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
53define void @global_size_x (i32 addrspace(1)* %out) {
54entry:
55 %0 = call i32 @llvm.r600.read.global.size.x() #0
56 store i32 %0, i32 addrspace(1)* %out
57 ret void
58}
59
60; R600-CHECK: @global_size_y
Tom Stellardac00f9d2013-08-16 01:11:46 +000061; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +000062; R600-CHECK: MOV * [[VAL]], KC0[1].X
Tom Stellard94593ee2013-06-03 17:40:18 +000063; SI-CHECK: @global_size_y
64; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 4
65; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
66; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
67define void @global_size_y (i32 addrspace(1)* %out) {
68entry:
69 %0 = call i32 @llvm.r600.read.global.size.y() #0
70 store i32 %0, i32 addrspace(1)* %out
71 ret void
72}
73
74; R600-CHECK: @global_size_z
Tom Stellardac00f9d2013-08-16 01:11:46 +000075; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +000076; R600-CHECK: MOV * [[VAL]], KC0[1].Y
Tom Stellard94593ee2013-06-03 17:40:18 +000077; SI-CHECK: @global_size_z
78; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 5
79; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
80; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
81define void @global_size_z (i32 addrspace(1)* %out) {
82entry:
83 %0 = call i32 @llvm.r600.read.global.size.z() #0
84 store i32 %0, i32 addrspace(1)* %out
85 ret void
86}
87
88; R600-CHECK: @local_size_x
Tom Stellardac00f9d2013-08-16 01:11:46 +000089; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +000090; R600-CHECK: MOV * [[VAL]], KC0[1].Z
Tom Stellard94593ee2013-06-03 17:40:18 +000091; SI-CHECK: @local_size_x
92; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 6
93; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
94; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
95define void @local_size_x (i32 addrspace(1)* %out) {
96entry:
97 %0 = call i32 @llvm.r600.read.local.size.x() #0
98 store i32 %0, i32 addrspace(1)* %out
99 ret void
100}
101
102; R600-CHECK: @local_size_y
Tom Stellardac00f9d2013-08-16 01:11:46 +0000103; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +0000104; R600-CHECK: MOV * [[VAL]], KC0[1].W
Tom Stellard94593ee2013-06-03 17:40:18 +0000105; SI-CHECK: @local_size_y
106; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 7
107; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
108; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
109define void @local_size_y (i32 addrspace(1)* %out) {
110entry:
111 %0 = call i32 @llvm.r600.read.local.size.y() #0
112 store i32 %0, i32 addrspace(1)* %out
113 ret void
114}
115
116; R600-CHECK: @local_size_z
Tom Stellardac00f9d2013-08-16 01:11:46 +0000117; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
Tom Stellardca69a532013-07-31 20:43:27 +0000118; R600-CHECK: MOV * [[VAL]], KC0[2].X
Tom Stellard94593ee2013-06-03 17:40:18 +0000119; SI-CHECK: @local_size_z
120; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 8
121; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
122; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
123define void @local_size_z (i32 addrspace(1)* %out) {
124entry:
125 %0 = call i32 @llvm.r600.read.local.size.z() #0
126 store i32 %0, i32 addrspace(1)* %out
127 ret void
128}
129
130; The tgid values are stored in SGPRs offset by the number of user SGPRs.
131; Currently we always use exactly 2 user SGPRs for the pointer to the
132; kernel arguments, but this may change in the future.
133
134; SI-CHECK: @tgid_x
135; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR2
136; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
137define void @tgid_x (i32 addrspace(1)* %out) {
138entry:
139 %0 = call i32 @llvm.r600.read.tgid.x() #0
140 store i32 %0, i32 addrspace(1)* %out
141 ret void
142}
143
144; SI-CHECK: @tgid_y
145; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR3
146; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
147define void @tgid_y (i32 addrspace(1)* %out) {
148entry:
149 %0 = call i32 @llvm.r600.read.tgid.y() #0
150 store i32 %0, i32 addrspace(1)* %out
151 ret void
152}
153
154; SI-CHECK: @tgid_z
155; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR4
156; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
157define void @tgid_z (i32 addrspace(1)* %out) {
158entry:
159 %0 = call i32 @llvm.r600.read.tgid.z() #0
160 store i32 %0, i32 addrspace(1)* %out
161 ret void
162}
163
164; SI-CHECK: @tidig_x
165; SI-CHECK: BUFFER_STORE_DWORD VGPR0
166define void @tidig_x (i32 addrspace(1)* %out) {
167entry:
168 %0 = call i32 @llvm.r600.read.tidig.x() #0
169 store i32 %0, i32 addrspace(1)* %out
170 ret void
171}
172
173; SI-CHECK: @tidig_y
174; SI-CHECK: BUFFER_STORE_DWORD VGPR1
175define void @tidig_y (i32 addrspace(1)* %out) {
176entry:
177 %0 = call i32 @llvm.r600.read.tidig.y() #0
178 store i32 %0, i32 addrspace(1)* %out
179 ret void
180}
181
182; SI-CHECK: @tidig_z
183; SI-CHECK: BUFFER_STORE_DWORD VGPR2
184define void @tidig_z (i32 addrspace(1)* %out) {
185entry:
186 %0 = call i32 @llvm.r600.read.tidig.z() #0
187 store i32 %0, i32 addrspace(1)* %out
188 ret void
189}
190
191declare i32 @llvm.r600.read.ngroups.x() #0
192declare i32 @llvm.r600.read.ngroups.y() #0
193declare i32 @llvm.r600.read.ngroups.z() #0
194
195declare i32 @llvm.r600.read.global.size.x() #0
196declare i32 @llvm.r600.read.global.size.y() #0
197declare i32 @llvm.r600.read.global.size.z() #0
198
199declare i32 @llvm.r600.read.local.size.x() #0
200declare i32 @llvm.r600.read.local.size.y() #0
201declare i32 @llvm.r600.read.local.size.z() #0
202
203declare i32 @llvm.r600.read.tgid.x() #0
204declare i32 @llvm.r600.read.tgid.y() #0
205declare i32 @llvm.r600.read.tgid.z() #0
206
207declare i32 @llvm.r600.read.tidig.x() #0
208declare i32 @llvm.r600.read.tidig.y() #0
209declare i32 @llvm.r600.read.tidig.z() #0
210
211attributes #0 = { readnone }