Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s |
| 2 | ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s |
| 3 | |
| 4 | ; R600-CHECK: @ngroups_x |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 5 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 6 | ; R600-CHECK: MOV * [[VAL]], KC0[0].X |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 7 | ; SI-CHECK: @ngroups_x |
| 8 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 0 |
| 9 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 10 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 11 | define void @ngroups_x (i32 addrspace(1)* %out) { |
| 12 | entry: |
| 13 | %0 = call i32 @llvm.r600.read.ngroups.x() #0 |
| 14 | store i32 %0, i32 addrspace(1)* %out |
| 15 | ret void |
| 16 | } |
| 17 | |
| 18 | ; R600-CHECK: @ngroups_y |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 19 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 20 | ; R600-CHECK: MOV * [[VAL]], KC0[0].Y |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 21 | ; SI-CHECK: @ngroups_y |
| 22 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 1 |
| 23 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 24 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 25 | define void @ngroups_y (i32 addrspace(1)* %out) { |
| 26 | entry: |
| 27 | %0 = call i32 @llvm.r600.read.ngroups.y() #0 |
| 28 | store i32 %0, i32 addrspace(1)* %out |
| 29 | ret void |
| 30 | } |
| 31 | |
| 32 | ; R600-CHECK: @ngroups_z |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 33 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 34 | ; R600-CHECK: MOV * [[VAL]], KC0[0].Z |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 35 | ; SI-CHECK: @ngroups_z |
| 36 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 2 |
| 37 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 38 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 39 | define void @ngroups_z (i32 addrspace(1)* %out) { |
| 40 | entry: |
| 41 | %0 = call i32 @llvm.r600.read.ngroups.z() #0 |
| 42 | store i32 %0, i32 addrspace(1)* %out |
| 43 | ret void |
| 44 | } |
| 45 | |
| 46 | ; R600-CHECK: @global_size_x |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 47 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 48 | ; R600-CHECK: MOV * [[VAL]], KC0[0].W |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 49 | ; SI-CHECK: @global_size_x |
| 50 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 3 |
| 51 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 52 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 53 | define void @global_size_x (i32 addrspace(1)* %out) { |
| 54 | entry: |
| 55 | %0 = call i32 @llvm.r600.read.global.size.x() #0 |
| 56 | store i32 %0, i32 addrspace(1)* %out |
| 57 | ret void |
| 58 | } |
| 59 | |
| 60 | ; R600-CHECK: @global_size_y |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 61 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 62 | ; R600-CHECK: MOV * [[VAL]], KC0[1].X |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 63 | ; SI-CHECK: @global_size_y |
| 64 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 4 |
| 65 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 66 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 67 | define void @global_size_y (i32 addrspace(1)* %out) { |
| 68 | entry: |
| 69 | %0 = call i32 @llvm.r600.read.global.size.y() #0 |
| 70 | store i32 %0, i32 addrspace(1)* %out |
| 71 | ret void |
| 72 | } |
| 73 | |
| 74 | ; R600-CHECK: @global_size_z |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 75 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 76 | ; R600-CHECK: MOV * [[VAL]], KC0[1].Y |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 77 | ; SI-CHECK: @global_size_z |
| 78 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 5 |
| 79 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 80 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 81 | define void @global_size_z (i32 addrspace(1)* %out) { |
| 82 | entry: |
| 83 | %0 = call i32 @llvm.r600.read.global.size.z() #0 |
| 84 | store i32 %0, i32 addrspace(1)* %out |
| 85 | ret void |
| 86 | } |
| 87 | |
| 88 | ; R600-CHECK: @local_size_x |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 89 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 90 | ; R600-CHECK: MOV * [[VAL]], KC0[1].Z |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 91 | ; SI-CHECK: @local_size_x |
| 92 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 6 |
| 93 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 94 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 95 | define void @local_size_x (i32 addrspace(1)* %out) { |
| 96 | entry: |
| 97 | %0 = call i32 @llvm.r600.read.local.size.x() #0 |
| 98 | store i32 %0, i32 addrspace(1)* %out |
| 99 | ret void |
| 100 | } |
| 101 | |
| 102 | ; R600-CHECK: @local_size_y |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 103 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 104 | ; R600-CHECK: MOV * [[VAL]], KC0[1].W |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 105 | ; SI-CHECK: @local_size_y |
| 106 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 7 |
| 107 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 108 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 109 | define void @local_size_y (i32 addrspace(1)* %out) { |
| 110 | entry: |
| 111 | %0 = call i32 @llvm.r600.read.local.size.y() #0 |
| 112 | store i32 %0, i32 addrspace(1)* %out |
| 113 | ret void |
| 114 | } |
| 115 | |
| 116 | ; R600-CHECK: @local_size_z |
Tom Stellard | ac00f9d | 2013-08-16 01:11:46 +0000 | [diff] [blame^] | 117 | ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] |
Tom Stellard | ca69a53 | 2013-07-31 20:43:27 +0000 | [diff] [blame] | 118 | ; R600-CHECK: MOV * [[VAL]], KC0[2].X |
Tom Stellard | 94593ee | 2013-06-03 17:40:18 +0000 | [diff] [blame] | 119 | ; SI-CHECK: @local_size_z |
| 120 | ; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 8 |
| 121 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] |
| 122 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 123 | define void @local_size_z (i32 addrspace(1)* %out) { |
| 124 | entry: |
| 125 | %0 = call i32 @llvm.r600.read.local.size.z() #0 |
| 126 | store i32 %0, i32 addrspace(1)* %out |
| 127 | ret void |
| 128 | } |
| 129 | |
| 130 | ; The tgid values are stored in SGPRs offset by the number of user SGPRs. |
| 131 | ; Currently we always use exactly 2 user SGPRs for the pointer to the |
| 132 | ; kernel arguments, but this may change in the future. |
| 133 | |
| 134 | ; SI-CHECK: @tgid_x |
| 135 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR2 |
| 136 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 137 | define void @tgid_x (i32 addrspace(1)* %out) { |
| 138 | entry: |
| 139 | %0 = call i32 @llvm.r600.read.tgid.x() #0 |
| 140 | store i32 %0, i32 addrspace(1)* %out |
| 141 | ret void |
| 142 | } |
| 143 | |
| 144 | ; SI-CHECK: @tgid_y |
| 145 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR3 |
| 146 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 147 | define void @tgid_y (i32 addrspace(1)* %out) { |
| 148 | entry: |
| 149 | %0 = call i32 @llvm.r600.read.tgid.y() #0 |
| 150 | store i32 %0, i32 addrspace(1)* %out |
| 151 | ret void |
| 152 | } |
| 153 | |
| 154 | ; SI-CHECK: @tgid_z |
| 155 | ; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR4 |
| 156 | ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] |
| 157 | define void @tgid_z (i32 addrspace(1)* %out) { |
| 158 | entry: |
| 159 | %0 = call i32 @llvm.r600.read.tgid.z() #0 |
| 160 | store i32 %0, i32 addrspace(1)* %out |
| 161 | ret void |
| 162 | } |
| 163 | |
| 164 | ; SI-CHECK: @tidig_x |
| 165 | ; SI-CHECK: BUFFER_STORE_DWORD VGPR0 |
| 166 | define void @tidig_x (i32 addrspace(1)* %out) { |
| 167 | entry: |
| 168 | %0 = call i32 @llvm.r600.read.tidig.x() #0 |
| 169 | store i32 %0, i32 addrspace(1)* %out |
| 170 | ret void |
| 171 | } |
| 172 | |
| 173 | ; SI-CHECK: @tidig_y |
| 174 | ; SI-CHECK: BUFFER_STORE_DWORD VGPR1 |
| 175 | define void @tidig_y (i32 addrspace(1)* %out) { |
| 176 | entry: |
| 177 | %0 = call i32 @llvm.r600.read.tidig.y() #0 |
| 178 | store i32 %0, i32 addrspace(1)* %out |
| 179 | ret void |
| 180 | } |
| 181 | |
| 182 | ; SI-CHECK: @tidig_z |
| 183 | ; SI-CHECK: BUFFER_STORE_DWORD VGPR2 |
| 184 | define void @tidig_z (i32 addrspace(1)* %out) { |
| 185 | entry: |
| 186 | %0 = call i32 @llvm.r600.read.tidig.z() #0 |
| 187 | store i32 %0, i32 addrspace(1)* %out |
| 188 | ret void |
| 189 | } |
| 190 | |
| 191 | declare i32 @llvm.r600.read.ngroups.x() #0 |
| 192 | declare i32 @llvm.r600.read.ngroups.y() #0 |
| 193 | declare i32 @llvm.r600.read.ngroups.z() #0 |
| 194 | |
| 195 | declare i32 @llvm.r600.read.global.size.x() #0 |
| 196 | declare i32 @llvm.r600.read.global.size.y() #0 |
| 197 | declare i32 @llvm.r600.read.global.size.z() #0 |
| 198 | |
| 199 | declare i32 @llvm.r600.read.local.size.x() #0 |
| 200 | declare i32 @llvm.r600.read.local.size.y() #0 |
| 201 | declare i32 @llvm.r600.read.local.size.z() #0 |
| 202 | |
| 203 | declare i32 @llvm.r600.read.tgid.x() #0 |
| 204 | declare i32 @llvm.r600.read.tgid.y() #0 |
| 205 | declare i32 @llvm.r600.read.tgid.z() #0 |
| 206 | |
| 207 | declare i32 @llvm.r600.read.tidig.x() #0 |
| 208 | declare i32 @llvm.r600.read.tidig.y() #0 |
| 209 | declare i32 @llvm.r600.read.tidig.z() #0 |
| 210 | |
| 211 | attributes #0 = { readnone } |