Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 1 | //===-- ARM64TargetMachine.h - Define TargetMachine for ARM64 ---*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file declares the ARM64 specific subclass of TargetMachine. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef ARM64TARGETMACHINE_H |
| 15 | #define ARM64TARGETMACHINE_H |
| 16 | |
| 17 | #include "ARM64InstrInfo.h" |
| 18 | #include "ARM64ISelLowering.h" |
| 19 | #include "ARM64Subtarget.h" |
| 20 | #include "ARM64FrameLowering.h" |
| 21 | #include "ARM64SelectionDAGInfo.h" |
| 22 | #include "llvm/IR/DataLayout.h" |
| 23 | #include "llvm/Target/TargetMachine.h" |
| 24 | #include "llvm/MC/MCStreamer.h" |
| 25 | |
| 26 | namespace llvm { |
| 27 | |
| 28 | class ARM64TargetMachine : public LLVMTargetMachine { |
| 29 | protected: |
| 30 | ARM64Subtarget Subtarget; |
| 31 | |
| 32 | private: |
| 33 | const DataLayout DL; |
| 34 | ARM64InstrInfo InstrInfo; |
| 35 | ARM64TargetLowering TLInfo; |
| 36 | ARM64FrameLowering FrameLowering; |
| 37 | ARM64SelectionDAGInfo TSInfo; |
| 38 | |
| 39 | public: |
| 40 | ARM64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, |
| 41 | const TargetOptions &Options, Reloc::Model RM, |
| 42 | CodeModel::Model CM, CodeGenOpt::Level OL); |
| 43 | |
Tim Northover | 3e52557 | 2014-03-30 07:25:18 +0000 | [diff] [blame] | 44 | const ARM64Subtarget *getSubtargetImpl() const override { return &Subtarget; } |
| 45 | const ARM64TargetLowering *getTargetLowering() const override { |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 46 | return &TLInfo; |
| 47 | } |
Tim Northover | 3e52557 | 2014-03-30 07:25:18 +0000 | [diff] [blame] | 48 | const DataLayout *getDataLayout() const override { return &DL; } |
| 49 | const ARM64FrameLowering *getFrameLowering() const override { |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 50 | return &FrameLowering; |
| 51 | } |
Tim Northover | 3e52557 | 2014-03-30 07:25:18 +0000 | [diff] [blame] | 52 | const ARM64InstrInfo *getInstrInfo() const override { return &InstrInfo; } |
| 53 | const ARM64RegisterInfo *getRegisterInfo() const override { |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 54 | return &InstrInfo.getRegisterInfo(); |
| 55 | } |
Tim Northover | 3e52557 | 2014-03-30 07:25:18 +0000 | [diff] [blame] | 56 | const ARM64SelectionDAGInfo *getSelectionDAGInfo() const override { |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 57 | return &TSInfo; |
| 58 | } |
| 59 | |
| 60 | // Pass Pipeline Configuration |
Tim Northover | 3e52557 | 2014-03-30 07:25:18 +0000 | [diff] [blame] | 61 | TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 62 | |
| 63 | /// \brief Register ARM64 analysis passes with a pass manager. |
Tim Northover | 3e52557 | 2014-03-30 07:25:18 +0000 | [diff] [blame] | 64 | void addAnalysisPasses(PassManagerBase &PM) override; |
Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 65 | }; |
| 66 | |
| 67 | } // end namespace llvm |
| 68 | |
| 69 | #endif |