blob: dcca3a2fab964c931a37efd13803442953e05c39 [file] [log] [blame]
Matt Arsenault7016f132017-08-03 22:30:46 +00001//===----------------------------------------------------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "AMDGPU.h"
11#include "AMDGPUArgumentUsageInfo.h"
12#include "SIRegisterInfo.h"
13#include "llvm/Support/raw_ostream.h"
14
15using namespace llvm;
16
17#define DEBUG_TYPE "amdgpu-argument-reg-usage-info"
18
19INITIALIZE_PASS(AMDGPUArgumentUsageInfo, DEBUG_TYPE,
20 "Argument Register Usage Information Storage", false, true)
21
22void ArgDescriptor::print(raw_ostream &OS,
23 const TargetRegisterInfo *TRI) const {
24 if (!isSet()) {
25 OS << "<not set>\n";
26 return;
27 }
28
29 if (isRegister())
Francis Visoiu Mistrih9d419d32017-11-28 12:42:37 +000030 OS << "Reg " << printReg(getRegister(), TRI) << '\n';
Matt Arsenault7016f132017-08-03 22:30:46 +000031 else
32 OS << "Stack offset " << getStackOffset() << '\n';
33}
34
35char AMDGPUArgumentUsageInfo::ID = 0;
36
37const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::ExternFunctionInfo{};
38
39bool AMDGPUArgumentUsageInfo::doInitialization(Module &M) {
40 return false;
41}
42
43bool AMDGPUArgumentUsageInfo::doFinalization(Module &M) {
44 ArgInfoMap.clear();
45 return false;
46}
47
48void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const {
49 for (const auto &FI : ArgInfoMap) {
50 OS << "Arguments for " << FI.first->getName() << '\n'
51 << " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer
52 << " DispatchPtr: " << FI.second.DispatchPtr
53 << " QueuePtr: " << FI.second.QueuePtr
54 << " KernargSegmentPtr: " << FI.second.KernargSegmentPtr
55 << " DispatchID: " << FI.second.DispatchID
56 << " FlatScratchInit: " << FI.second.FlatScratchInit
57 << " PrivateSegmentSize: " << FI.second.PrivateSegmentSize
58 << " GridWorkgroupCountX: " << FI.second.GridWorkGroupCountX
59 << " GridWorkgroupCountY: " << FI.second.GridWorkGroupCountY
60 << " GridWorkgroupCountZ: " << FI.second.GridWorkGroupCountZ
61 << " WorkGroupIDX: " << FI.second.WorkGroupIDX
62 << " WorkGroupIDY: " << FI.second.WorkGroupIDY
63 << " WorkGroupIDZ: " << FI.second.WorkGroupIDZ
64 << " WorkGroupInfo: " << FI.second.WorkGroupInfo
65 << " PrivateSegmentWaveByteOffset: "
66 << FI.second.PrivateSegmentWaveByteOffset
67 << " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr
Matt Arsenault817c2532017-08-03 23:12:44 +000068 << " ImplicitArgPtr: " << FI.second.ImplicitArgPtr
Matt Arsenault7016f132017-08-03 22:30:46 +000069 << " WorkItemIDX " << FI.second.WorkItemIDX
70 << " WorkItemIDY " << FI.second.WorkItemIDY
71 << " WorkItemIDZ " << FI.second.WorkItemIDZ
72 << '\n';
73 }
74}
75
76std::pair<const ArgDescriptor *, const TargetRegisterClass *>
77AMDGPUFunctionArgInfo::getPreloadedValue(
78 AMDGPUFunctionArgInfo::PreloadedValue Value) const {
79 switch (Value) {
80 case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER: {
81 return std::make_pair(
82 PrivateSegmentBuffer ? &PrivateSegmentBuffer : nullptr,
83 &AMDGPU::SGPR_128RegClass);
84 }
85 case AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR:
86 return std::make_pair(ImplicitBufferPtr ? &ImplicitBufferPtr : nullptr,
87 &AMDGPU::SGPR_64RegClass);
88 case AMDGPUFunctionArgInfo::WORKGROUP_ID_X:
89 return std::make_pair(WorkGroupIDX ? &WorkGroupIDX : nullptr,
90 &AMDGPU::SGPR_32RegClass);
91
92 case AMDGPUFunctionArgInfo::WORKGROUP_ID_Y:
93 return std::make_pair(WorkGroupIDY ? &WorkGroupIDY : nullptr,
94 &AMDGPU::SGPR_32RegClass);
95 case AMDGPUFunctionArgInfo::WORKGROUP_ID_Z:
96 return std::make_pair(WorkGroupIDZ ? &WorkGroupIDZ : nullptr,
97 &AMDGPU::SGPR_32RegClass);
98 case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET:
99 return std::make_pair(
100 PrivateSegmentWaveByteOffset ? &PrivateSegmentWaveByteOffset : nullptr,
101 &AMDGPU::SGPR_32RegClass);
102 case AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR:
103 return std::make_pair(KernargSegmentPtr ? &KernargSegmentPtr : nullptr,
104 &AMDGPU::SGPR_64RegClass);
Matt Arsenault817c2532017-08-03 23:12:44 +0000105 case AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR:
106 return std::make_pair(ImplicitArgPtr ? &ImplicitArgPtr : nullptr,
107 &AMDGPU::SGPR_64RegClass);
Matt Arsenault7016f132017-08-03 22:30:46 +0000108 case AMDGPUFunctionArgInfo::DISPATCH_ID:
109 return std::make_pair(DispatchID ? &DispatchID : nullptr,
110 &AMDGPU::SGPR_64RegClass);
111 case AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT:
112 return std::make_pair(FlatScratchInit ? &FlatScratchInit : nullptr,
113 &AMDGPU::SGPR_64RegClass);
114 case AMDGPUFunctionArgInfo::DISPATCH_PTR:
115 return std::make_pair(DispatchPtr ? &DispatchPtr : nullptr,
116 &AMDGPU::SGPR_64RegClass);
117 case AMDGPUFunctionArgInfo::QUEUE_PTR:
118 return std::make_pair(QueuePtr ? &QueuePtr : nullptr,
119 &AMDGPU::SGPR_64RegClass);
120 case AMDGPUFunctionArgInfo::WORKITEM_ID_X:
121 return std::make_pair(WorkItemIDX ? &WorkItemIDX : nullptr,
122 &AMDGPU::VGPR_32RegClass);
123 case AMDGPUFunctionArgInfo::WORKITEM_ID_Y:
124 return std::make_pair(WorkItemIDY ? &WorkItemIDY : nullptr,
125 &AMDGPU::VGPR_32RegClass);
126 case AMDGPUFunctionArgInfo::WORKITEM_ID_Z:
127 return std::make_pair(WorkItemIDZ ? &WorkItemIDZ : nullptr,
128 &AMDGPU::VGPR_32RegClass);
129 }
130 llvm_unreachable("unexpected preloaded value type");
131}