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Dan Gohman10e730a2015-06-29 23:51:55 +00001//=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief This file contains the WebAssembly implementation of the
12/// TargetInstrInfo class.
13///
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
17#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
18
19#include "WebAssemblyRegisterInfo.h"
David Blaikie3f833ed2017-11-08 01:01:31 +000020#include "llvm/CodeGen/TargetInstrInfo.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000021
JF Bastienb9073fb2015-07-22 21:28:15 +000022#define GET_INSTRINFO_HEADER
23#include "WebAssemblyGenInstrInfo.inc"
24
Dan Gohman10e730a2015-06-29 23:51:55 +000025namespace llvm {
26
27class WebAssemblySubtarget;
28
JF Bastienb9073fb2015-07-22 21:28:15 +000029class WebAssemblyInstrInfo final : public WebAssemblyGenInstrInfo {
Dan Gohman10e730a2015-06-29 23:51:55 +000030 const WebAssemblyRegisterInfo RI;
31
32public:
33 explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
34
35 const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
Dan Gohman4f52e002015-09-09 00:52:47 +000036
Duncan P. N. Exon Smith9cfc75c2016-06-30 00:01:54 +000037 bool isReallyTriviallyReMaterializable(const MachineInstr &MI,
Dan Gohmanb6fd39a2016-01-19 16:59:23 +000038 AliasAnalysis *AA) const override;
39
Dan Gohman4f52e002015-09-09 00:52:47 +000040 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
Benjamin Kramerbdc49562016-06-12 15:39:02 +000041 const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
Dan Gohman4f52e002015-09-09 00:52:47 +000042 bool KillSrc) const override;
Duncan P. N. Exon Smith9cfc75c2016-06-30 00:01:54 +000043 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
Dan Gohmanadf28172016-01-28 01:22:44 +000044 unsigned OpIdx1,
45 unsigned OpIdx2) const override;
Dan Gohman950a13c2015-09-16 16:51:30 +000046
Jacques Pienaar71c30a12016-07-15 14:41:04 +000047 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
Dan Gohman950a13c2015-09-16 16:51:30 +000048 MachineBasicBlock *&FBB,
49 SmallVectorImpl<MachineOperand> &Cond,
50 bool AllowModify = false) const override;
Matt Arsenault1b9fc8e2016-09-14 20:43:16 +000051 unsigned removeBranch(MachineBasicBlock &MBB,
Matt Arsenaulta2b036e2016-09-14 17:23:48 +000052 int *BytesRemoved = nullptr) const override;
Matt Arsenaulte8e0f5c2016-09-14 17:24:15 +000053 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
Dan Gohman7a6b9822015-11-29 22:32:02 +000054 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
Matt Arsenaulta2b036e2016-09-14 17:23:48 +000055 const DebugLoc &DL,
56 int *BytesAdded = nullptr) const override;
Dan Gohman950a13c2015-09-16 16:51:30 +000057 bool
Matt Arsenault1b9fc8e2016-09-14 20:43:16 +000058 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
Dan Gohman10e730a2015-06-29 23:51:55 +000059};
60
61} // end namespace llvm
62
63#endif