Matt Arsenault | c3a73c3 | 2014-05-22 03:20:30 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s |
| 2 | |
| 3 | ; SI-LABEL: @uint_to_fp_f64_i32 |
| 4 | ; SI: V_CVT_F64_U32_e32 |
Matt Arsenault | aeca2fa | 2014-05-31 06:47:42 +0000 | [diff] [blame^] | 5 | ; SI: S_ENDPGM |
Matt Arsenault | c3a73c3 | 2014-05-22 03:20:30 +0000 | [diff] [blame] | 6 | define void @uint_to_fp_f64_i32(double addrspace(1)* %out, i32 %in) { |
| 7 | %cast = uitofp i32 %in to double |
| 8 | store double %cast, double addrspace(1)* %out, align 8 |
| 9 | ret void |
| 10 | } |
Matt Arsenault | aeca2fa | 2014-05-31 06:47:42 +0000 | [diff] [blame^] | 11 | |
| 12 | ; SI-LABEL: @uint_to_fp_i1_f64: |
| 13 | ; SI: V_CMP_EQ_I32_e64 [[CMP:s\[[0-9]+:[0-9]\]]], |
| 14 | ; SI-NEXT: V_CNDMASK_B32_e64 [[IRESULT:v[0-9]+]], 0, 1, [[CMP]] |
| 15 | ; SI-NEXT: V_CVT_F64_U32_e32 [[RESULT:v\[[0-9]+:[0-9]\]]], [[IRESULT]] |
| 16 | ; SI: BUFFER_STORE_DWORDX2 [[RESULT]], |
| 17 | ; SI: S_ENDPGM |
| 18 | define void @uint_to_fp_i1_f64(double addrspace(1)* %out, i32 %in) { |
| 19 | %cmp = icmp eq i32 %in, 0 |
| 20 | %fp = uitofp i1 %cmp to double |
| 21 | store double %fp, double addrspace(1)* %out, align 4 |
| 22 | ret void |
| 23 | } |
| 24 | |
| 25 | ; SI-LABEL: @uint_to_fp_i1_f64_load: |
| 26 | ; SI: V_CNDMASK_B32_e64 [[IRESULT:v[0-9]]], 0, 1 |
| 27 | ; SI-NEXT: V_CVT_F64_U32_e32 [[RESULT:v\[[0-9]+:[0-9]\]]], [[IRESULT]] |
| 28 | ; SI: BUFFER_STORE_DWORDX2 [[RESULT]] |
| 29 | ; SI: S_ENDPGM |
| 30 | define void @uint_to_fp_i1_f64_load(double addrspace(1)* %out, i1 %in) { |
| 31 | %fp = uitofp i1 %in to double |
| 32 | store double %fp, double addrspace(1)* %out, align 8 |
| 33 | ret void |
| 34 | } |