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gerrit-public.fairphone.software / toolchain / llvm-project / af7754324418aab9566cd6c97392d0b3f88df62b / . / llvm / lib / Target / R600 / SIISelLowering.h
blob: 1ac6e0dfcd73d577f00f351dea02a66387af0893 [file] [log] [blame]
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]1//===-- SIISelLowering.h - SI DAG Lowering Interface ------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief SI DAG Lowering interface definition
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef SIISELLOWERING_H
16#define SIISELLOWERING_H
17
18#include "AMDGPUISelLowering.h"
19#include "SIInstrInfo.h"
20
21namespace llvm {
22
23class SITargetLowering : public AMDGPUTargetLowering {
Tom Stellardaf775432013-10-23 00:44:32 +0000[diff] [blame^]24 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL,
Tom Stellard94593ee2013-06-03 17:40:18 +0000[diff] [blame]25 SDValue Chain, unsigned Offset) const;
Tom Stellard9fa17912013-08-14 23:24:45 +0000[diff] [blame]26 SDValue LowerSampleIntrinsic(unsigned Opcode, const SDValue &Op,
27 SelectionDAG &DAG) const;
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]28 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
Tom Stellard046039e2013-06-03 17:40:03 +0000[diff] [blame]29 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const;
Tom Stellard98f675a2013-08-01 15:23:26 +0000[diff] [blame]30 SDValue LowerZERO_EXTEND(SDValue Op, SelectionDAG &DAG) const;
Tom Stellardf8794352012-12-19 22:10:31 +0000[diff] [blame]31 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]32
Tom Stellard9fa17912013-08-14 23:24:45 +0000[diff] [blame]33 SDValue ResourceDescriptorToi128(SDValue Op, SelectionDAG &DAG) const;
Christian Konigf82901a2013-02-26 17:52:23 +0000[diff] [blame]34 bool foldImm(SDValue &Operand, int32_t &Immediate,
35 bool &ScalarSlotUsed) const;
Tom Stellard4c0ffcc2013-08-06 23:08:18 +0000[diff] [blame]36 const TargetRegisterClass *getRegClassForNode(SelectionDAG &DAG,
37 const SDValue &Op) const;
Tom Stellardb35efba2013-05-20 15:02:01 +0000[diff] [blame]38 bool fitsRegClass(SelectionDAG &DAG, const SDValue &Op,
39 unsigned RegClass) const;
Matt Arsenault758659232013-05-18 00:21:46 +0000[diff] [blame]40 void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
Christian Konigf82901a2013-02-26 17:52:23 +0000[diff] [blame]41 unsigned RegClass, bool &ScalarSlotUsed) const;
42
Christian Konig8e06e2a2013-04-10 08:39:08 +0000[diff] [blame]43 SDNode *foldOperands(MachineSDNode *N, SelectionDAG &DAG) const;
44 void adjustWritemask(MachineSDNode *&N, SelectionDAG &DAG) const;
Tom Stellard0518ff82013-06-03 17:39:58 +0000[diff] [blame]45 MachineSDNode *AdjustRegClass(MachineSDNode *N, SelectionDAG &DAG) const;
Christian Konig8e06e2a2013-04-10 08:39:08 +0000[diff] [blame]46
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]47public:
48 SITargetLowering(TargetMachine &tm);
Tom Stellard0125f2a2013-06-25 02:39:35 +0000[diff] [blame]49 bool allowsUnalignedMemoryAccesses(EVT VT, bool *IsFast) const;
Tom Stellardd86003e2013-08-14 23:25:00 +0000[diff] [blame]50 virtual bool shouldSplitVectorElementType(EVT VT) const;
Christian Konig2c8f6d52013-03-07 09:03:52 +0000[diff] [blame]51
52 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
53 bool isVarArg,
54 const SmallVectorImpl<ISD::InputArg> &Ins,
Andrew Trickef9de2a2013-05-25 02:42:55 +0000[diff] [blame]55 SDLoc DL, SelectionDAG &DAG,
Christian Konig2c8f6d52013-03-07 09:03:52 +0000[diff] [blame]56 SmallVectorImpl<SDValue> &InVals) const;
57
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]58 virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr * MI,
59 MachineBasicBlock * BB) const;
Matt Arsenault758659232013-05-18 00:21:46 +0000[diff] [blame]60 virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const;
Christian Konig082a14a2013-03-18 11:34:05 +0000[diff] [blame]61 virtual MVT getScalarShiftAmountTy(EVT VT) const;
Niels Ole Salscheiderd3a039f2013-08-10 10:38:54 +0000[diff] [blame]62 virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const;
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]63 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
64 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
Christian Konigd910b7d2013-02-26 17:52:16 +0000[diff] [blame]65 virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const;
Christian Konig8b1ed282013-04-10 08:39:16 +0000[diff] [blame]66 virtual void AdjustInstrPostInstrSelection(MachineInstr *MI,
67 SDNode *Node) const;
Christian Konigf82901a2013-02-26 17:52:23 +0000[diff] [blame]68
69 int32_t analyzeImmediate(const SDNode *N) const;
Tom Stellard94593ee2013-06-03 17:40:18 +0000[diff] [blame]70 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
71 unsigned Reg, EVT VT) const;
Tom Stellard75aadc22012-12-11 21:25:42 +0000[diff] [blame]72};
73
74} // End namespace llvm
75
76#endif //SIISELLOWERING_H