blob: 92d16c560aad1a912b5f0d63366e9e2da63ba234 [file] [log] [blame]
Tom Stellardafcf12f2013-09-12 02:55:14 +00001;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
2
3;CHECK_LABEL: @test1
4;CHECK: TBUFFER_STORE_FORMAT_XYZW {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 32, -1, 0, -1, 0, 14, 4, {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1, 0, 0
5define void @test1(i32 %a1, i32 %vaddr) {
6 %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
7 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
8 i32 4, i32 %vaddr, i32 0, i32 32, i32 14, i32 4, i32 1, i32 0, i32 1,
9 i32 1, i32 0)
10 ret void
11}
12
13;CHECK_LABEL: @test2
14;CHECK: TBUFFER_STORE_FORMAT_XYZ {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 24, -1, 0, -1, 0, 13, 4, {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1, 0, 0
15define void @test2(i32 %a1, i32 %vaddr) {
16 %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
17 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
18 i32 3, i32 %vaddr, i32 0, i32 24, i32 13, i32 4, i32 1, i32 0, i32 1,
19 i32 1, i32 0)
20 ret void
21}
22
23;CHECK_LABEL: @test3
24;CHECK: TBUFFER_STORE_FORMAT_XY {{VGPR[0-9]+_VGPR[0-9]+}}, 16, -1, 0, -1, 0, 11, 4, {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1, 0, 0
25define void @test3(i32 %a1, i32 %vaddr) {
26 %vdata = insertelement <2 x i32> undef, i32 %a1, i32 0
27 call void @llvm.SI.tbuffer.store.v2i32(<16 x i8> undef, <2 x i32> %vdata,
28 i32 2, i32 %vaddr, i32 0, i32 16, i32 11, i32 4, i32 1, i32 0, i32 1,
29 i32 1, i32 0)
30 ret void
31}
32
33;CHECK_LABEL: @test4
34;CHECK: TBUFFER_STORE_FORMAT_X {{VGPR[0-9]+}}, 8, -1, 0, -1, 0, 4, 4, {{VGPR[0-9]+}}, {{SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+_SGPR[0-9]+}}, -1, 0, 0
35define void @test4(i32 %vdata, i32 %vaddr) {
36 call void @llvm.SI.tbuffer.store.i32(<16 x i8> undef, i32 %vdata,
37 i32 1, i32 %vaddr, i32 0, i32 8, i32 4, i32 4, i32 1, i32 0, i32 1,
38 i32 1, i32 0)
39 ret void
40}
41
42declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
43declare void @llvm.SI.tbuffer.store.v2i32(<16 x i8>, <2 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
44declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)