Simon Pilgrim | 94d5dba | 2017-04-19 11:06:22 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| 2 | ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s |
| 3 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK64 |
| 4 | |
| 5 | ; Check a few invalid patterns for halfword bswap pattern matching |
| 6 | |
| 7 | ; Don't match a near-miss 32-bit packed halfword bswap |
| 8 | ; (with only half of the swap tree valid). |
| 9 | define i32 @test1(i32 %x) nounwind { |
| 10 | ; CHECK-LABEL: test1: |
| 11 | ; CHECK: # BB#0: |
Hans Wennborg | b00ffd8 | 2017-05-18 18:50:05 +0000 | [diff] [blame^] | 12 | ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx |
| 13 | ; CHECK-NEXT: movl %ecx, %edx |
| 14 | ; CHECK-NEXT: andl $16711680, %edx # imm = 0xFF0000 |
| 15 | ; CHECK-NEXT: movl %ecx, %eax |
| 16 | ; CHECK-NEXT: orl $-16777216, %eax # imm = 0xFF000000 |
| 17 | ; CHECK-NEXT: shll $8, %edx |
| 18 | ; CHECK-NEXT: shrl $8, %eax |
| 19 | ; CHECK-NEXT: bswapl %ecx |
| 20 | ; CHECK-NEXT: shrl $16, %ecx |
Simon Pilgrim | 94d5dba | 2017-04-19 11:06:22 +0000 | [diff] [blame] | 21 | ; CHECK-NEXT: orl %edx, %eax |
Hans Wennborg | b00ffd8 | 2017-05-18 18:50:05 +0000 | [diff] [blame^] | 22 | ; CHECK-NEXT: orl %ecx, %eax |
Simon Pilgrim | 94d5dba | 2017-04-19 11:06:22 +0000 | [diff] [blame] | 23 | ; CHECK-NEXT: retl |
| 24 | ; |
| 25 | ; CHECK64-LABEL: test1: |
| 26 | ; CHECK64: # BB#0: |
Dehao Chen | 65dd23e | 2017-05-12 19:29:27 +0000 | [diff] [blame] | 27 | ; CHECK64-NEXT: movl %edi, %ecx |
Hans Wennborg | b00ffd8 | 2017-05-18 18:50:05 +0000 | [diff] [blame^] | 28 | ; CHECK64-NEXT: andl $16711680, %ecx # imm = 0xFF0000 |
| 29 | ; CHECK64-NEXT: movl %edi, %eax |
| 30 | ; CHECK64-NEXT: orl $-16777216, %eax # imm = 0xFF000000 |
| 31 | ; CHECK64-NEXT: shll $8, %ecx |
| 32 | ; CHECK64-NEXT: shrl $8, %eax |
Simon Pilgrim | 94d5dba | 2017-04-19 11:06:22 +0000 | [diff] [blame] | 33 | ; CHECK64-NEXT: bswapl %edi |
| 34 | ; CHECK64-NEXT: shrl $16, %edi |
Hans Wennborg | b00ffd8 | 2017-05-18 18:50:05 +0000 | [diff] [blame^] | 35 | ; CHECK64-NEXT: orl %ecx, %eax |
| 36 | ; CHECK64-NEXT: orl %edi, %eax |
Simon Pilgrim | 94d5dba | 2017-04-19 11:06:22 +0000 | [diff] [blame] | 37 | ; CHECK64-NEXT: retq |
| 38 | %byte0 = and i32 %x, 255 ; 0x000000ff |
| 39 | %byte1 = and i32 %x, 65280 ; 0x0000ff00 |
| 40 | %byte2 = and i32 %x, 16711680 ; 0x00ff0000 |
| 41 | %byte3 = or i32 %x, 4278190080 ; 0xff000000 |
| 42 | %tmp0 = shl i32 %byte0, 8 |
| 43 | %tmp1 = lshr i32 %byte1, 8 |
| 44 | %tmp2 = shl i32 %byte2, 8 |
| 45 | %tmp3 = lshr i32 %byte3, 8 |
| 46 | %or0 = or i32 %tmp0, %tmp1 |
| 47 | %or1 = or i32 %tmp2, %tmp3 |
| 48 | %result = or i32 %or0, %or1 |
| 49 | ret i32 %result |
| 50 | } |
| 51 | |
| 52 | ; Don't match a near-miss 32-bit packed halfword bswap |
| 53 | ; (with swapped lshr/shl) |
| 54 | ; ((x >> 8) & 0x0000ff00) | |
| 55 | ; ((x << 8) & 0x000000ff) | |
| 56 | ; ((x << 8) & 0xff000000) | |
| 57 | ; ((x >> 8) & 0x00ff0000) |
| 58 | define i32 @test2(i32 %x) nounwind { |
| 59 | ; CHECK-LABEL: test2: |
| 60 | ; CHECK: # BB#0: |
| 61 | ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx |
| 62 | ; CHECK-NEXT: movl %ecx, %eax |
| 63 | ; CHECK-NEXT: shrl $8, %eax |
| 64 | ; CHECK-NEXT: shll $8, %ecx |
| 65 | ; CHECK-NEXT: movl %eax, %edx |
| 66 | ; CHECK-NEXT: andl $65280, %edx # imm = 0xFF00 |
| 67 | ; CHECK-NEXT: andl $-16777216, %ecx # imm = 0xFF000000 |
| 68 | ; CHECK-NEXT: andl $16711680, %eax # imm = 0xFF0000 |
| 69 | ; CHECK-NEXT: orl %ecx, %eax |
| 70 | ; CHECK-NEXT: orl %edx, %eax |
| 71 | ; CHECK-NEXT: retl |
| 72 | ; |
| 73 | ; CHECK64-LABEL: test2: |
| 74 | ; CHECK64: # BB#0: |
| 75 | ; CHECK64-NEXT: movl %edi, %eax |
| 76 | ; CHECK64-NEXT: shrl $8, %eax |
| 77 | ; CHECK64-NEXT: shll $8, %edi |
| 78 | ; CHECK64-NEXT: movl %eax, %ecx |
| 79 | ; CHECK64-NEXT: andl $65280, %ecx # imm = 0xFF00 |
| 80 | ; CHECK64-NEXT: andl $-16777216, %edi # imm = 0xFF000000 |
| 81 | ; CHECK64-NEXT: andl $16711680, %eax # imm = 0xFF0000 |
| 82 | ; CHECK64-NEXT: orl %edi, %eax |
| 83 | ; CHECK64-NEXT: leal (%rax,%rcx), %eax |
| 84 | ; CHECK64-NEXT: retq |
| 85 | %byte1 = lshr i32 %x, 8 |
| 86 | %byte0 = shl i32 %x, 8 |
| 87 | %byte3 = shl i32 %x, 8 |
| 88 | %byte2 = lshr i32 %x, 8 |
| 89 | %tmp1 = and i32 %byte1, 65280 ; 0x0000ff00 |
| 90 | %tmp0 = and i32 %byte0, 255 ; 0x000000ff |
| 91 | %tmp3 = and i32 %byte3, 4278190080 ; 0xff000000 |
| 92 | %tmp2 = and i32 %byte2, 16711680 ; 0x00ff0000 |
| 93 | %or0 = or i32 %tmp0, %tmp1 |
| 94 | %or1 = or i32 %tmp2, %tmp3 |
| 95 | %result = or i32 %or0, %or1 |
| 96 | ret i32 %result |
| 97 | } |
| 98 | |
| 99 | ; Invalid pattern involving a unary op |
| 100 | define i32 @test3(float %x) nounwind { |
| 101 | ; CHECK-LABEL: test3: |
| 102 | ; CHECK: # BB#0: |
| 103 | ; CHECK-NEXT: subl $8, %esp |
| 104 | ; CHECK-NEXT: flds {{[0-9]+}}(%esp) |
| 105 | ; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) |
| 106 | ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax |
| 107 | ; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F |
| 108 | ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) |
| 109 | ; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) |
| 110 | ; CHECK-NEXT: fistpl {{[0-9]+}}(%esp) |
| 111 | ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) |
| 112 | ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx |
| 113 | ; CHECK-NEXT: movl %ecx, %edx |
| 114 | ; CHECK-NEXT: shll $8, %edx |
| 115 | ; CHECK-NEXT: movl %ecx, %eax |
| 116 | ; CHECK-NEXT: shrl $8, %eax |
| 117 | ; CHECK-NEXT: andl $65280, %ecx # imm = 0xFF00 |
| 118 | ; CHECK-NEXT: andl $-16777216, %edx # imm = 0xFF000000 |
| 119 | ; CHECK-NEXT: andl $16711680, %eax # imm = 0xFF0000 |
| 120 | ; CHECK-NEXT: orl %edx, %eax |
| 121 | ; CHECK-NEXT: orl %ecx, %eax |
| 122 | ; CHECK-NEXT: addl $8, %esp |
| 123 | ; CHECK-NEXT: retl |
| 124 | ; |
| 125 | ; CHECK64-LABEL: test3: |
| 126 | ; CHECK64: # BB#0: |
| 127 | ; CHECK64-NEXT: cvttss2si %xmm0, %ecx |
| 128 | ; CHECK64-NEXT: movl %ecx, %edx |
| 129 | ; CHECK64-NEXT: shll $8, %edx |
| 130 | ; CHECK64-NEXT: movl %ecx, %eax |
| 131 | ; CHECK64-NEXT: shrl $8, %eax |
| 132 | ; CHECK64-NEXT: andl $65280, %ecx # imm = 0xFF00 |
| 133 | ; CHECK64-NEXT: andl $-16777216, %edx # imm = 0xFF000000 |
| 134 | ; CHECK64-NEXT: andl $16711680, %eax # imm = 0xFF0000 |
| 135 | ; CHECK64-NEXT: orl %edx, %eax |
| 136 | ; CHECK64-NEXT: orl %ecx, %eax |
| 137 | ; CHECK64-NEXT: retq |
| 138 | %integer = fptosi float %x to i32 |
| 139 | %byte0 = shl i32 %integer, 8 |
| 140 | %byte3 = shl i32 %integer, 8 |
| 141 | %byte2 = lshr i32 %integer, 8 |
| 142 | %tmp1 = and i32 %integer, 65280 ; 0x0000ff00 |
| 143 | %tmp0 = and i32 %byte0, 255 ; 0x000000ff |
| 144 | %tmp3 = and i32 %byte3, 4278190080 ; 0xff000000 |
| 145 | %tmp2 = and i32 %byte2, 16711680 ; 0x00ff0000 |
| 146 | %or0 = or i32 %tmp0, %tmp1 |
| 147 | %or1 = or i32 %tmp2, %tmp3 |
| 148 | %result = or i32 %or0, %or1 |
| 149 | ret i32 %result |
| 150 | } |