Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / b01cd1aa747e333b6e60e5f8abec953f9ca9b0e1 / . / llvm / test / CodeGen / X86 / tbm_patterns.ll
blob: a8d55481b5bb41863814a7ec56398f4e7d05385b [file] [log] [blame]
Craig Topperb01cd1a2013-10-03 04:16:45 +0000[diff] [blame^]1; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
2
3define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
4entry:
5 ; CHECK-LABEL: test_x86_tbm_bextri_u32:
6 ; CHECK-NOT: mov
7 ; CHECK: bextr $
8 %0 = lshr i32 %a, 4
9 %1 = and i32 %0, 4095
10 ret i32 %1
11}
12
13define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
14entry:
15 ; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
16 ; CHECK-NOT: mov
17 ; CHECK: bextr $
18 %0 = load i32* %a
19 %1 = lshr i32 %0, 4
20 %2 = and i32 %1, 4095
21 ret i32 %2
22}
23
24define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
25entry:
26 ; CHECK-LABEL: test_x86_tbm_bextri_u64:
27 ; CHECK-NOT: mov
28 ; CHECK: bextr $
29 %0 = lshr i64 %a, 4
30 %1 = and i64 %0, 4095
31 ret i64 %1
32}
33
34define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
35entry:
36 ; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
37 ; CHECK-NOT: mov
38 ; CHECK: bextr $
39 %0 = load i64* %a
40 %1 = lshr i64 %0, 4
41 %2 = and i64 %1, 4095
42 ret i64 %2
43}
44
45define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind readnone {
46entry:
47 ; CHECK-LABEL: test_x86_tbm_blcfill_u32:
48 ; CHECK-NOT: mov
49 ; CHECK: blcfill %
50 %0 = add i32 %a, 1
51 %1 = and i32 %0, %a
52 ret i32 %1
53}
54
55define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind readnone {
56entry:
57 ; CHECK-LABEL: test_x86_tbm_blcfill_u64:
58 ; CHECK-NOT: mov
59 ; CHECK: blcfill %
60 %0 = add i64 %a, 1
61 %1 = and i64 %0, %a
62 ret i64 %1
63}
64
65define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind readnone {
66entry:
67 ; CHECK-LABEL: test_x86_tbm_blci_u32:
68 ; CHECK-NOT: mov
69 ; CHECK: blci %
70 %0 = add i32 1, %a
71 %1 = xor i32 %0, -1
72 %2 = or i32 %1, %a
73 ret i32 %2
74}
75
76define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind readnone {
77entry:
78 ; CHECK-LABEL: test_x86_tbm_blci_u64:
79 ; CHECK-NOT: mov
80 ; CHECK: blci %
81 %0 = add i64 1, %a
82 %1 = xor i64 %0, -1
83 %2 = or i64 %1, %a
84 ret i64 %2
85}
86
87define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind readnone {
88entry:
89 ; CHECK-LABEL: test_x86_tbm_blcic_u32:
90 ; CHECK-NOT: mov
91 ; CHECK: blcic %
92 %0 = xor i32 %a, -1
93 %1 = add i32 %a, 1
94 %2 = and i32 %1, %0
95 ret i32 %2
96}
97
98define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind readnone {
99entry:
100 ; CHECK-LABEL: test_x86_tbm_blcic_u64:
101 ; CHECK-NOT: mov
102 ; CHECK: blcic %
103 %0 = xor i64 %a, -1
104 %1 = add i64 %a, 1
105 %2 = and i64 %1, %0
106 ret i64 %2
107}
108
109define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind readnone {
110entry:
111 ; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
112 ; CHECK-NOT: mov
113 ; CHECK: blcmsk %
114 %0 = add i32 %a, 1
115 %1 = xor i32 %0, %a
116 ret i32 %1
117}
118
119define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind readnone {
120entry:
121 ; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
122 ; CHECK-NOT: mov
123 ; CHECK: blcmsk %
124 %0 = add i64 %a, 1
125 %1 = xor i64 %0, %a
126 ret i64 %1
127}
128
129define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind readnone {
130entry:
131 ; CHECK-LABEL: test_x86_tbm_blcs_u32:
132 ; CHECK-NOT: mov
133 ; CHECK: blcs %
134 %0 = add i32 %a, 1
135 %1 = or i32 %0, %a
136 ret i32 %1
137}
138
139define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind readnone {
140entry:
141 ; CHECK-LABEL: test_x86_tbm_blcs_u64:
142 ; CHECK-NOT: mov
143 ; CHECK: blcs %
144 %0 = add i64 %a, 1
145 %1 = or i64 %0, %a
146 ret i64 %1
147}
148
149define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind readnone {
150entry:
151 ; CHECK-LABEL: test_x86_tbm_blsfill_u32:
152 ; CHECK-NOT: mov
153 ; CHECK: blsfill %
154 %0 = add i32 %a, -1
155 %1 = or i32 %0, %a
156 ret i32 %1
157}
158
159define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind readnone {
160entry:
161 ; CHECK-LABEL: test_x86_tbm_blsfill_u64:
162 ; CHECK-NOT: mov
163 ; CHECK: blsfill %
164 %0 = add i64 %a, -1
165 %1 = or i64 %0, %a
166 ret i64 %1
167}
168
169define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind readnone {
170entry:
171 ; CHECK-LABEL: test_x86_tbm_blsic_u32:
172 ; CHECK-NOT: mov
173 ; CHECK: blsic %
174 %0 = xor i32 %a, -1
175 %1 = add i32 %a, -1
176 %2 = or i32 %0, %1
177 ret i32 %2
178}
179
180define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind readnone {
181entry:
182 ; CHECK-LABEL: test_x86_tbm_blsic_u64:
183 ; CHECK-NOT: mov
184 ; CHECK: blsic %
185 %0 = xor i64 %a, -1
186 %1 = add i64 %a, -1
187 %2 = or i64 %0, %1
188 ret i64 %2
189}
190
191define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind readnone {
192entry:
193 ; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
194 ; CHECK-NOT: mov
195 ; CHECK: t1mskc %
196 %0 = xor i32 %a, -1
197 %1 = add i32 %a, 1
198 %2 = or i32 %0, %1
199 ret i32 %2
200}
201
202define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind readnone {
203entry:
204 ; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
205 ; CHECK-NOT: mov
206 ; CHECK: t1mskc %
207 %0 = xor i64 %a, -1
208 %1 = add i64 %a, 1
209 %2 = or i64 %0, %1
210 ret i64 %2
211}
212
213define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind readnone {
214entry:
215 ; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
216 ; CHECK-NOT: mov
217 ; CHECK: tzmsk %
218 %0 = xor i32 %a, -1
219 %1 = add i32 %a, -1
220 %2 = and i32 %0, %1
221 ret i32 %2
222}
223
224define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind readnone {
225entry:
226 ; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
227 ; CHECK-NOT: mov
228 ; CHECK: tzmsk %
229 %0 = xor i64 %a, -1
230 %1 = add i64 %a, -1
231 %2 = and i64 %0, %1
232 ret i64 %2
233}
234; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
235
236define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
237entry:
238 ; CHECK-LABEL: test_x86_tbm_bextri_u32:
239 ; CHECK-NOT: mov
240 ; CHECK: bextr $
241 %0 = lshr i32 %a, 4
242 %1 = and i32 %0, 4095
243 ret i32 %1
244}
245
246define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
247entry:
248 ; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
249 ; CHECK-NOT: mov
250 ; CHECK: bextr $
251 %0 = load i32* %a
252 %1 = lshr i32 %0, 4
253 %2 = and i32 %1, 4095
254 ret i32 %2
255}
256
257define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
258entry:
259 ; CHECK-LABEL: test_x86_tbm_bextri_u64:
260 ; CHECK-NOT: mov
261 ; CHECK: bextr $
262 %0 = lshr i64 %a, 4
263 %1 = and i64 %0, 4095
264 ret i64 %1
265}
266
267define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
268entry:
269 ; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
270 ; CHECK-NOT: mov
271 ; CHECK: bextr $
272 %0 = load i64* %a
273 %1 = lshr i64 %0, 4
274 %2 = and i64 %1, 4095
275 ret i64 %2
276}
277
278define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind readnone {
279entry:
280 ; CHECK-LABEL: test_x86_tbm_blcfill_u32:
281 ; CHECK-NOT: mov
282 ; CHECK: blcfill %
283 %0 = add i32 %a, 1
284 %1 = and i32 %0, %a
285 ret i32 %1
286}
287
288define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind readnone {
289entry:
290 ; CHECK-LABEL: test_x86_tbm_blcfill_u64:
291 ; CHECK-NOT: mov
292 ; CHECK: blcfill %
293 %0 = add i64 %a, 1
294 %1 = and i64 %0, %a
295 ret i64 %1
296}
297
298define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind readnone {
299entry:
300 ; CHECK-LABEL: test_x86_tbm_blci_u32:
301 ; CHECK-NOT: mov
302 ; CHECK: blci %
303 %0 = add i32 1, %a
304 %1 = xor i32 %0, -1
305 %2 = or i32 %1, %a
306 ret i32 %2
307}
308
309define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind readnone {
310entry:
311 ; CHECK-LABEL: test_x86_tbm_blci_u64:
312 ; CHECK-NOT: mov
313 ; CHECK: blci %
314 %0 = add i64 1, %a
315 %1 = xor i64 %0, -1
316 %2 = or i64 %1, %a
317 ret i64 %2
318}
319
320define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind readnone {
321entry:
322 ; CHECK-LABEL: test_x86_tbm_blcic_u32:
323 ; CHECK-NOT: mov
324 ; CHECK: blcic %
325 %0 = xor i32 %a, -1
326 %1 = add i32 %a, 1
327 %2 = and i32 %1, %0
328 ret i32 %2
329}
330
331define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind readnone {
332entry:
333 ; CHECK-LABEL: test_x86_tbm_blcic_u64:
334 ; CHECK-NOT: mov
335 ; CHECK: blcic %
336 %0 = xor i64 %a, -1
337 %1 = add i64 %a, 1
338 %2 = and i64 %1, %0
339 ret i64 %2
340}
341
342define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind readnone {
343entry:
344 ; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
345 ; CHECK-NOT: mov
346 ; CHECK: blcmsk %
347 %0 = add i32 %a, 1
348 %1 = xor i32 %0, %a
349 ret i32 %1
350}
351
352define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind readnone {
353entry:
354 ; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
355 ; CHECK-NOT: mov
356 ; CHECK: blcmsk %
357 %0 = add i64 %a, 1
358 %1 = xor i64 %0, %a
359 ret i64 %1
360}
361
362define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind readnone {
363entry:
364 ; CHECK-LABEL: test_x86_tbm_blcs_u32:
365 ; CHECK-NOT: mov
366 ; CHECK: blcs %
367 %0 = add i32 %a, 1
368 %1 = or i32 %0, %a
369 ret i32 %1
370}
371
372define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind readnone {
373entry:
374 ; CHECK-LABEL: test_x86_tbm_blcs_u64:
375 ; CHECK-NOT: mov
376 ; CHECK: blcs %
377 %0 = add i64 %a, 1
378 %1 = or i64 %0, %a
379 ret i64 %1
380}
381
382define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind readnone {
383entry:
384 ; CHECK-LABEL: test_x86_tbm_blsfill_u32:
385 ; CHECK-NOT: mov
386 ; CHECK: blsfill %
387 %0 = add i32 %a, -1
388 %1 = or i32 %0, %a
389 ret i32 %1
390}
391
392define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind readnone {
393entry:
394 ; CHECK-LABEL: test_x86_tbm_blsfill_u64:
395 ; CHECK-NOT: mov
396 ; CHECK: blsfill %
397 %0 = add i64 %a, -1
398 %1 = or i64 %0, %a
399 ret i64 %1
400}
401
402define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind readnone {
403entry:
404 ; CHECK-LABEL: test_x86_tbm_blsic_u32:
405 ; CHECK-NOT: mov
406 ; CHECK: blsic %
407 %0 = xor i32 %a, -1
408 %1 = add i32 %a, -1
409 %2 = or i32 %0, %1
410 ret i32 %2
411}
412
413define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind readnone {
414entry:
415 ; CHECK-LABEL: test_x86_tbm_blsic_u64:
416 ; CHECK-NOT: mov
417 ; CHECK: blsic %
418 %0 = xor i64 %a, -1
419 %1 = add i64 %a, -1
420 %2 = or i64 %0, %1
421 ret i64 %2
422}
423
424define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind readnone {
425entry:
426 ; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
427 ; CHECK-NOT: mov
428 ; CHECK: t1mskc %
429 %0 = xor i32 %a, -1
430 %1 = add i32 %a, 1
431 %2 = or i32 %0, %1
432 ret i32 %2
433}
434
435define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind readnone {
436entry:
437 ; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
438 ; CHECK-NOT: mov
439 ; CHECK: t1mskc %
440 %0 = xor i64 %a, -1
441 %1 = add i64 %a, 1
442 %2 = or i64 %0, %1
443 ret i64 %2
444}
445
446define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind readnone {
447entry:
448 ; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
449 ; CHECK-NOT: mov
450 ; CHECK: tzmsk %
451 %0 = xor i32 %a, -1
452 %1 = add i32 %a, -1
453 %2 = and i32 %0, %1
454 ret i32 %2
455}
456
457define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind readnone {
458entry:
459 ; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
460 ; CHECK-NOT: mov
461 ; CHECK: tzmsk %
462 %0 = xor i64 %a, -1
463 %1 = add i64 %a, -1
464 %2 = and i64 %0, %1
465 ret i64 %2
466}