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Marek Olsak43650e42015-03-24 13:40:08 +00001; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
3; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
4; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
Matt Arsenault8e34ecb2014-06-19 04:24:43 +00005
Marek Olsak43650e42015-03-24 13:40:08 +00006declare float @llvm.fabs.f32(float %Val)
Matt Arsenault8e34ecb2014-06-19 04:24:43 +00007declare float @llvm.AMDGPU.fract.f32(float) nounwind readnone
8
9; Legacy name
10declare float @llvm.AMDIL.fraction.f32(float) nounwind readnone
11
Tom Stellard79243d92014-10-01 17:15:17 +000012; FUNC-LABEL: {{^}}fract_f32:
Marek Olsak43650e42015-03-24 13:40:08 +000013; CI: v_fract_f32_e32 [[RESULT:v[0-9]+]], [[INPUT:v[0-9]+]]
14; SI: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
15; SI: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[FLR]], [[INPUT]]
16; GCN: buffer_store_dword [[RESULT]]
Matt Arsenault8e34ecb2014-06-19 04:24:43 +000017; EG: FRACT
18define void @fract_f32(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +000019 %val = load float, float addrspace(1)* %src, align 4
Matt Arsenault8e34ecb2014-06-19 04:24:43 +000020 %fract = call float @llvm.AMDGPU.fract.f32(float %val) nounwind readnone
21 store float %fract, float addrspace(1)* %out, align 4
22 ret void
23}
24
Tom Stellard79243d92014-10-01 17:15:17 +000025; FUNC-LABEL: {{^}}fract_f32_legacy_amdil:
Marek Olsak43650e42015-03-24 13:40:08 +000026; CI: v_fract_f32_e32 [[RESULT:v[0-9]+]], [[INPUT:v[0-9]+]]
27; SI: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
28; SI: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[FLR]], [[INPUT]]
29; GCN: buffer_store_dword [[RESULT]]
Matt Arsenault8e34ecb2014-06-19 04:24:43 +000030; EG: FRACT
31define void @fract_f32_legacy_amdil(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +000032 %val = load float, float addrspace(1)* %src, align 4
Matt Arsenault8e34ecb2014-06-19 04:24:43 +000033 %fract = call float @llvm.AMDIL.fraction.f32(float %val) nounwind readnone
34 store float %fract, float addrspace(1)* %out, align 4
35 ret void
36}
Marek Olsak43650e42015-03-24 13:40:08 +000037
38; FUNC-LABEL: {{^}}fract_f32_neg:
39; CI: v_fract_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT:v[0-9]+]]
40; SI: v_floor_f32_e64 [[FLR:v[0-9]+]], -[[INPUT:v[0-9]+]]
41; SI: v_sub_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT]], [[FLR]]
42; GCN: buffer_store_dword [[RESULT]]
43; EG: FRACT
44define void @fract_f32_neg(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
45 %val = load float, float addrspace(1)* %src, align 4
46 %neg = fsub float 0.0, %val
47 %fract = call float @llvm.AMDGPU.fract.f32(float %neg) nounwind readnone
48 store float %fract, float addrspace(1)* %out, align 4
49 ret void
50}
51
52; FUNC-LABEL: {{^}}fract_f32_neg_abs:
53; CI: v_fract_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
54; SI: v_floor_f32_e64 [[FLR:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
55; SI: v_sub_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT]]|, [[FLR]]
56; GCN: buffer_store_dword [[RESULT]]
57; EG: FRACT
58define void @fract_f32_neg_abs(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
59 %val = load float, float addrspace(1)* %src, align 4
60 %abs = call float @llvm.fabs.f32(float %val)
61 %neg = fsub float 0.0, %abs
62 %fract = call float @llvm.AMDGPU.fract.f32(float %neg) nounwind readnone
63 store float %fract, float addrspace(1)* %out, align 4
64 ret void
65}