| Mehdi Amini | 945a660 | 2015-02-27 18:32:11 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s |
| 2 | ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s |
| 3 | ; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s |
| Chad Rosier | f3e73ad | 2011-11-04 00:50:21 +0000 | [diff] [blame] | 4 | |
| 5 | ; Sign-extend of i1 currently not supported by fast-isel |
| 6 | ;define signext i1 @ret0(i1 signext %a) nounwind uwtable ssp { |
| 7 | ;entry: |
| 8 | ; ret i1 %a |
| 9 | ;} |
| 10 | |
| 11 | define zeroext i1 @ret1(i1 signext %a) nounwind uwtable ssp { |
| 12 | entry: |
| 13 | ; CHECK: ret1 |
| 14 | ; CHECK: and r0, r0, #1 |
| 15 | ; CHECK: bx lr |
| 16 | ret i1 %a |
| 17 | } |
| 18 | |
| 19 | define signext i8 @ret2(i8 signext %a) nounwind uwtable ssp { |
| 20 | entry: |
| 21 | ; CHECK: ret2 |
| 22 | ; CHECK: sxtb r0, r0 |
| 23 | ; CHECK: bx lr |
| 24 | ret i8 %a |
| 25 | } |
| 26 | |
| 27 | define zeroext i8 @ret3(i8 signext %a) nounwind uwtable ssp { |
| 28 | entry: |
| 29 | ; CHECK: ret3 |
| JF Bastien | 06ce03d | 2013-06-07 20:10:37 +0000 | [diff] [blame] | 30 | ; CHECK: and r0, r0, #255 |
| Chad Rosier | f3e73ad | 2011-11-04 00:50:21 +0000 | [diff] [blame] | 31 | ; CHECK: bx lr |
| 32 | ret i8 %a |
| 33 | } |
| 34 | |
| 35 | define signext i16 @ret4(i16 signext %a) nounwind uwtable ssp { |
| 36 | entry: |
| 37 | ; CHECK: ret4 |
| 38 | ; CHECK: sxth r0, r0 |
| 39 | ; CHECK: bx lr |
| 40 | ret i16 %a |
| 41 | } |
| 42 | |
| 43 | define zeroext i16 @ret5(i16 signext %a) nounwind uwtable ssp { |
| 44 | entry: |
| 45 | ; CHECK: ret5 |
| 46 | ; CHECK: uxth r0, r0 |
| 47 | ; CHECK: bx lr |
| 48 | ret i16 %a |
| 49 | } |
| Chad Rosier | fcd29ae | 2012-02-17 01:21:28 +0000 | [diff] [blame] | 50 | |
| 51 | define i16 @ret6(i16 %a) nounwind uwtable ssp { |
| 52 | entry: |
| 53 | ; CHECK: ret6 |
| 54 | ; CHECK-NOT: uxth |
| 55 | ; CHECK-NOT: sxth |
| 56 | ; CHECK: bx lr |
| 57 | ret i16 %a |
| 58 | } |