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gerrit-public.fairphone.software / toolchain / llvm-project / b13c91f159fa9b631cb15dc02ea0b72b2802ac4d / . / llvm / test / CodeGen / PowerPC / memcpy-vec.ll
blob: 29baef55ce17caa77a31e3cbb49373bfe03cdf9d [file] [log] [blame]
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]1; RUN: llc -mcpu=pwr7 < %s | FileCheck %s -check-prefix=PWR7
2; RUN: llc -mcpu=pwr8 < %s | FileCheck %s -check-prefix=PWR8
3; RUN: llc -mcpu=a2q < %s | FileCheck %s -check-prefix=A2Q
4target datalayout = "E-m:e-i64:64-n32:64"
5target triple = "powerpc64-unknown-linux-gnu"
6
7; Function Attrs: nounwind
8define void @foo1(double* nocapture %x, double* nocapture readonly %y) #0 {
9entry:
10 %0 = bitcast double* %x to i8*
11 %1 = bitcast double* %y to i8*
Pete Cooper67cf9a72015-11-19 05:56:52 +0000[diff] [blame]12 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 32, i32 8, i1 false)
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]13 ret void
14
15; PWR7-LABEL: @foo1
16; PWR7-NOT: bl memcpy
Matt Arsenaultd9c83012015-08-28 17:31:28 +0000[diff] [blame]17; PWR7-DAG: li [[OFFSET:[0-9]+]], 16
18; PWR7-DAG: lxvd2x [[TMP0:[0-9]+]], 4, [[OFFSET]]
19; PWR7-DAG: stxvd2x [[TMP0]], 0, 3
20; PWR7-DAG: lxvd2x [[TMP1:[0-9]+]], 0, 4
21; PWR7-DAG: stxvd2x [[TMP1]], 0, 3
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]22; PWR7: blr
23
24; PWR8-LABEL: @foo1
25; PWR8: lxvw4x
26; PWR8: stxvw4x
27; PWR8: blr
28
29; A2Q-LABEL: @foo1
30; A2Q-NOT: bl memcpy
31; A2Q: ld {{[0-9]+}}, {{[0-9]+}}(4)
32; A2Q: std {{[0-9]+}}, {{[0-9]+}}(3)
33; A2Q: blr
34}
35
36; Function Attrs: nounwind
Pete Cooper67cf9a72015-11-19 05:56:52 +0000[diff] [blame]37declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #0
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]38
39; Function Attrs: nounwind
40define void @foo2(double* nocapture %x, double* nocapture readonly %y) #0 {
41entry:
42 %0 = bitcast double* %x to i8*
43 %1 = bitcast double* %y to i8*
Pete Cooper67cf9a72015-11-19 05:56:52 +0000[diff] [blame]44 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 128, i32 8, i1 false)
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]45 ret void
46
47; PWR7-LABEL: @foo2
48; PWR7: bl memcpy
49; PWR7: blr
50
51; PWR8-LABEL: @foo2
52; PWR8: lxvw4x
53; PWR8: stxvw4x
54; PWR8: blr
55
56; A2Q-LABEL: @foo2
57; A2Q-NOT: bl memcpy
58; A2Q: ld {{[0-9]+}}, {{[0-9]+}}(4)
59; A2Q: std {{[0-9]+}}, {{[0-9]+}}(3)
60; A2Q: blr
61}
62
63; Function Attrs: nounwind
64define void @bar1(double* nocapture %x) #0 {
65entry:
66 %0 = bitcast double* %x to i8*
Pete Cooper67cf9a72015-11-19 05:56:52 +0000[diff] [blame]67 tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 128, i32 8, i1 false)
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]68 ret void
69
70; PWR7-LABEL: @bar1
71; PWR7-NOT: bl memset
72; PWR7: stxvw4x
73; PWR7: blr
74
75; PWR8-LABEL: @bar1
76; PWR8-NOT: bl memset
77; PWR8: stxvw4x
78; PWR8: blr
79
80; A2Q-LABEL: @bar1
81; A2Q-NOT: bl memset
82; A2Q: std {{[0-9]+}}, {{[0-9]+}}(3)
83; A2Q: blr
84}
85
86; Function Attrs: nounwind
87define void @bar2(double* nocapture %x) #0 {
88entry:
89 %0 = bitcast double* %x to i8*
Pete Cooper67cf9a72015-11-19 05:56:52 +0000[diff] [blame]90 tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 128, i32 32, i1 false)
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]91 ret void
92
93; PWR7-LABEL: @bar2
94; PWR7-NOT: bl memset
95; PWR7: stxvw4x
96; PWR7: blr
97
98; PWR8-LABEL: @bar2
99; PWR8-NOT: bl memset
100; PWR8: stxvw4x
101; PWR8: blr
102
103; A2Q-LABEL: @bar2
104; A2Q-NOT: bl memset
105; A2Q: qvstfdx
106; A2Q: blr
107}
108
109; Function Attrs: nounwind
Pete Cooper67cf9a72015-11-19 05:56:52 +0000[diff] [blame]110declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #0
Hal Finkel5c3cacf2015-02-27 19:58:28 +0000[diff] [blame]111
112attributes #0 = { nounwind }
113