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gerrit-public.fairphone.software / toolchain / llvm-project / b25adf5edba0bfb487828600f4294702e695fdba / . / llvm / test / CodeGen / WebAssembly / simd-select.ll
blob: 5ffb87d13a64d0009b54081811305459c2ad7971 [file] [log] [blame]
Thomas Lively38c902b2018-11-09 01:38:44 +0000[diff] [blame]1; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s
2
3; Test that vector selects of various varieties lower correctly to bitselects.
4
5target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
6target triple = "wasm32-unknown-unknown"
7
8; ==============================================================================
9; 16 x i8
10; ==============================================================================
11; CHECK-LABEL: vselect_v16i8:
12; CHECK-NEXT: .param v128, v128, v128{{$}}
13; CHECK-NEXT: .result v128{{$}}
14; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 7{{$}}
15; CHECK-NEXT: i8x16.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
16; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 7{{$}}
17; CHECK-NEXT: i8x16.shr_s $push[[L3:[0-9]+]]=, $pop[[L1]], $pop[[L2]]{{$}}
18; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
19; CHECK-NEXT: return $pop[[R]]{{$}}
20define <16 x i8> @vselect_v16i8(<16 x i1> %c, <16 x i8> %x, <16 x i8> %y) {
21 %res = select <16 x i1> %c, <16 x i8> %x, <16 x i8> %y
22 ret <16 x i8> %res
23}
24
25; CHECK-LABEL: select_v16i8:
26; CHECK-NEXT: .param i32, v128, v128{{$}}
27; CHECK-NEXT: .result v128{{$}}
28; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
29; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
30; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
31; CHECK-NEXT: i8x16.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
32; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
33; CHECK-NEXT: return $pop[[R]]{{$}}
34define <16 x i8> @select_v16i8(i1 %c, <16 x i8> %x, <16 x i8> %y) {
35 %res = select i1 %c, <16 x i8> %x, <16 x i8> %y
36 ret <16 x i8> %res
37}
38
39; CHECK-LABEL: select_cmp_v16i8:
40; CHECK-NEXT: .param i32, v128, v128{{$}}
41; CHECK-NEXT: .result v128{{$}}
42; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31
43; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
44; CHECK-NEXT: i8x16.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
45; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L2]]{{$}}
46; CHECK-NEXT: return $pop[[R]]{{$}}
47define <16 x i8> @select_cmp_v16i8(i32 %i, <16 x i8> %x, <16 x i8> %y) {
48 %c = icmp slt i32 %i, 0
49 %res = select i1 %c, <16 x i8> %x, <16 x i8> %y
50 ret <16 x i8> %res
51}
52
53; CHECK-LABEL: select_ne_v16i8:
54; CHECK-NEXT: .param i32, v128, v128{{$}}
55; CHECK-NEXT: .result v128{{$}}
56; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
57; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
58; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
59; CHECK-NEXT: i8x16.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
60; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
61; CHECK-NEXT: return $pop[[R]]{{$}}
62define <16 x i8> @select_ne_v16i8(i32 %i, <16 x i8> %x, <16 x i8> %y) {
63 %c = icmp ne i32 %i, 0
64 %res = select i1 %c, <16 x i8> %x, <16 x i8> %y
65 ret <16 x i8> %res
66}
67
68; CHECK-LABEL: select_eq_v16i8:
69; CHECK-NEXT: .param i32, v128, v128{{$}}
70; CHECK-NEXT: .result v128{{$}}
71; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
72; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
73; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
74; CHECK-NEXT: i8x16.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
75; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
76; CHECK-NEXT: return $pop[[R]]{{$}}
77define <16 x i8> @select_eq_v16i8(i32 %i, <16 x i8> %x, <16 x i8> %y) {
78 %c = icmp eq i32 %i, 0
79 %res = select i1 %c, <16 x i8> %x, <16 x i8> %y
80 ret <16 x i8> %res
81}
82
83; ==============================================================================
84; 8 x i16
85; ==============================================================================
86; CHECK-LABEL: vselect_v8i16:
87; CHECK-NEXT: .param v128, v128, v128{{$}}
88; CHECK-NEXT: .result v128{{$}}
89; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 15{{$}}
90; CHECK-NEXT: i16x8.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
91; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 15{{$}}
92; CHECK-NEXT: i16x8.shr_s $push[[L3:[0-9]+]]=, $pop[[L1]], $pop[[L2]]{{$}}
93; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
94; CHECK-NEXT: return $pop[[R]]{{$}}
95define <8 x i16> @vselect_v8i16(<8 x i1> %c, <8 x i16> %x, <8 x i16> %y) {
96 %res = select <8 x i1> %c, <8 x i16> %x, <8 x i16> %y
97 ret <8 x i16> %res
98}
99
100; CHECK-LABEL: select_v8i16:
101; CHECK-NEXT: .param i32, v128, v128{{$}}
102; CHECK-NEXT: .result v128{{$}}
103; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
104; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
105; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
106; CHECK-NEXT: i16x8.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
107; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
108; CHECK-NEXT: return $pop[[R]]{{$}}
109define <8 x i16> @select_v8i16(i1 %c, <8 x i16> %x, <8 x i16> %y) {
110 %res = select i1 %c, <8 x i16> %x, <8 x i16> %y
111 ret <8 x i16> %res
112}
113
114; CHECK-LABEL: select_cmp_v8i16:
115; CHECK-NEXT: .param i32, v128, v128{{$}}
116; CHECK-NEXT: .result v128{{$}}
117; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
118; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
119; CHECK-NEXT: i16x8.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
120; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L2]]{{$}}
121; CHECK-NEXT: return $pop[[R]]{{$}}
122define <8 x i16> @select_cmp_v8i16(i32 %i, <8 x i16> %x, <8 x i16> %y) {
123 %c = icmp slt i32 %i, 0
124 %res = select i1 %c, <8 x i16> %x, <8 x i16> %y
125 ret <8 x i16> %res
126}
127
128; CHECK-LABEL: select_ne_v8i16:
129; CHECK-NEXT: .param i32, v128, v128{{$}}
130; CHECK-NEXT: .result v128{{$}}
131; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
132; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
133; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
134; CHECK-NEXT: i16x8.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
135; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
136; CHECK-NEXT: return $pop[[R]]{{$}}
137define <8 x i16> @select_ne_v8i16(i32 %i, <8 x i16> %x, <8 x i16> %y) {
138 %c = icmp ne i32 %i, 0
139 %res = select i1 %c, <8 x i16> %x, <8 x i16> %y
140 ret <8 x i16> %res
141}
142
143; CHECK-LABEL: select_eq_v8i16:
144; CHECK-NEXT: .param i32, v128, v128{{$}}
145; CHECK-NEXT: .result v128{{$}}
146; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
147; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
148; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
149; CHECK-NEXT: i16x8.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
150; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
151; CHECK-NEXT: return $pop[[R]]{{$}}
152define <8 x i16> @select_eq_v8i16(i32 %i, <8 x i16> %x, <8 x i16> %y) {
153 %c = icmp eq i32 %i, 0
154 %res = select i1 %c, <8 x i16> %x, <8 x i16> %y
155 ret <8 x i16> %res
156}
157
158; ==============================================================================
159; 4 x i32
160; ==============================================================================
161; CHECK-LABEL: vselect_v4i32:
162; CHECK-NEXT: .param v128, v128, v128{{$}}
163; CHECK-NEXT: .result v128{{$}}
164; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
165; CHECK-NEXT: i32x4.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
166; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 31{{$}}
167; CHECK-NEXT: i32x4.shr_s $push[[L3:[0-9]+]]=, $pop[[L1]], $pop[[L2]]{{$}}
168; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
169; CHECK-NEXT: return $pop[[R]]{{$}}
170define <4 x i32> @vselect_v4i32(<4 x i1> %c, <4 x i32> %x, <4 x i32> %y) {
171 %res = select <4 x i1> %c, <4 x i32> %x, <4 x i32> %y
172 ret <4 x i32> %res
173}
174
175
176; CHECK-LABEL: select_v4i32:
177; CHECK-NEXT: .param i32, v128, v128{{$}}
178; CHECK-NEXT: .result v128{{$}}
179; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
180; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
181; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
182; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
183; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
184; CHECK-NEXT: return $pop[[R]]{{$}}
185define <4 x i32> @select_v4i32(i1 %c, <4 x i32> %x, <4 x i32> %y) {
186 %res = select i1 %c, <4 x i32> %x, <4 x i32> %y
187 ret <4 x i32> %res
188}
189
190; CHECK-LABEL: select_cmp_v4i32:
191; CHECK-NEXT: .param i32, v128, v128{{$}}
192; CHECK-NEXT: .result v128{{$}}
193; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
194; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
195; CHECK-NEXT: i32x4.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
196; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L2]]{{$}}
197; CHECK-NEXT: return $pop[[R]]{{$}}
198define <4 x i32> @select_cmp_v4i32(i32 %i, <4 x i32> %x, <4 x i32> %y) {
199 %c = icmp slt i32 %i, 0
200 %res = select i1 %c, <4 x i32> %x, <4 x i32> %y
201 ret <4 x i32> %res
202}
203
204; CHECK-LABEL: select_ne_v4i32:
205; CHECK-NEXT: .param i32, v128, v128{{$}}
206; CHECK-NEXT: .result v128{{$}}
207; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
208; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
209; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
210; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
211; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
212; CHECK-NEXT: return $pop[[R]]{{$}}
213define <4 x i32> @select_ne_v4i32(i32 %i, <4 x i32> %x, <4 x i32> %y) {
214 %c = icmp ne i32 %i, 0
215 %res = select i1 %c, <4 x i32> %x, <4 x i32> %y
216 ret <4 x i32> %res
217}
218
219; CHECK-LABEL: select_eq_v4i32:
220; CHECK-NEXT: .param i32, v128, v128{{$}}
221; CHECK-NEXT: .result v128{{$}}
222; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
223; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
224; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
225; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
226; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
227; CHECK-NEXT: return $pop[[R]]{{$}}
228define <4 x i32> @select_eq_v4i32(i32 %i, <4 x i32> %x, <4 x i32> %y) {
229 %c = icmp eq i32 %i, 0
230 %res = select i1 %c, <4 x i32> %x, <4 x i32> %y
231 ret <4 x i32> %res
232}
233
234; ==============================================================================
235; 2 x i64
236; ==============================================================================
237; CHECK-LABEL: vselect_v2i64:
238; CHECK-NEXT: .param v128, v128, v128{{$}}
239; CHECK-NEXT: .result v128{{$}}
240; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 63{{$}}
241; CHECK-NEXT: i64x2.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
242; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 63{{$}}
243; CHECK-NEXT: i64x2.shr_s $push[[L3:[0-9]+]]=, $pop[[L1]], $pop[[L2]]{{$}}
244; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
245; CHECK-NEXT: return $pop[[R]]{{$}}
246define <2 x i64> @vselect_v2i64(<2 x i1> %c, <2 x i64> %x, <2 x i64> %y) {
247 %res = select <2 x i1> %c, <2 x i64> %x, <2 x i64> %y
248 ret <2 x i64> %res
249}
250
251; CHECK-LABEL: select_v2i64:
252; CHECK-NEXT: .param i32, v128, v128{{$}}
253; CHECK-NEXT: .result v128{{$}}
254; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
255; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
256; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
257; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
258; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
259; CHECK-NEXT: return $pop[[R]]{{$}}
260define <2 x i64> @select_v2i64(i1 %c, <2 x i64> %x, <2 x i64> %y) {
261 %res = select i1 %c, <2 x i64> %x, <2 x i64> %y
262 ret <2 x i64> %res
263}
264
265; CHECK-LABEL: select_cmp_v2i64:
266; CHECK-NEXT: .param i32, v128, v128{{$}}
267; CHECK-NEXT: .result v128{{$}}
268; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
269; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
270; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 0{{$}}
271; CHECK-NEXT: i32.lt_s $push[[L3:[0-9]+]]=, $0, $pop[[L2]]{{$}}
272; CHECK-NEXT: i64.select $push[[L4:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $pop[[L3]]{{$}}
273; CHECK-NEXT: i64x2.splat $push[[L5:[0-9]+]]=, $pop[[L4]]{{$}}
274; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L5]]{{$}}
275; CHECK-NEXT: return $pop[[R]]{{$}}
276define <2 x i64> @select_cmp_v2i64(i32 %i, <2 x i64> %x, <2 x i64> %y) {
277 %c = icmp slt i32 %i, 0
278 %res = select i1 %c, <2 x i64> %x, <2 x i64> %y
279 ret <2 x i64> %res
280}
281
282; CHECK-LABEL: select_ne_v2i64:
283; CHECK-NEXT: .param i32, v128, v128{{$}}
284; CHECK-NEXT: .result v128{{$}}
285; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
286; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
287; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
288; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
289; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
290; CHECK-NEXT: return $pop[[R]]{{$}}
291define <2 x i64> @select_ne_v2i64(i32 %i, <2 x i64> %x, <2 x i64> %y) {
292 %c = icmp ne i32 %i, 0
293 %res = select i1 %c, <2 x i64> %x, <2 x i64> %y
294 ret <2 x i64> %res
295}
296
297; CHECK-LABEL: select_eq_v2i64:
298; CHECK-NEXT: .param i32, v128, v128{{$}}
299; CHECK-NEXT: .result v128{{$}}
300; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, 0{{$}}
301; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, -1{{$}}
302; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
303; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
304; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
305; CHECK-NEXT: return $pop[[R]]{{$}}
306define <2 x i64> @select_eq_v2i64(i32 %i, <2 x i64> %x, <2 x i64> %y) {
307 %c = icmp eq i32 %i, 0
308 %res = select i1 %c, <2 x i64> %x, <2 x i64> %y
309 ret <2 x i64> %res
310}
311
312; ==============================================================================
313; 4 x float
314; ==============================================================================
315; CHECK-LABEL: vselect_v4f32:
316; CHECK-NEXT: .param v128, v128, v128{{$}}
317; CHECK-NEXT: .result v128{{$}}
318; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
319; CHECK-NEXT: i32x4.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
320; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 31{{$}}
321; CHECK-NEXT: i32x4.shr_s $push[[L3:[0-9]+]]=, $pop[[L1]], $pop[[L2]]{{$}}
322; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
323; CHECK-NEXT: return $pop[[R]]{{$}}
324define <4 x float> @vselect_v4f32(<4 x i1> %c, <4 x float> %x, <4 x float> %y) {
325 %res = select <4 x i1> %c, <4 x float> %x, <4 x float> %y
326 ret <4 x float> %res
327}
328
329; CHECK-LABEL: select_v4f32:
330; CHECK-NEXT: .param i32, v128, v128{{$}}
331; CHECK-NEXT: .result v128{{$}}
332; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
333; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
334; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
335; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
336; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
337; CHECK-NEXT: return $pop[[R]]{{$}}
338define <4 x float> @select_v4f32(i1 %c, <4 x float> %x, <4 x float> %y) {
339 %res = select i1 %c, <4 x float> %x, <4 x float> %y
340 ret <4 x float> %res
341}
342
343; CHECK-LABEL: select_cmp_v4f32:
344; CHECK-NEXT: .param i32, v128, v128{{$}}
345; CHECK-NEXT: .result v128{{$}}
346; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 31{{$}}
347; CHECK-NEXT: i32.shr_s $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
348; CHECK-NEXT: i32x4.splat $push[[L2:[0-9]+]]=, $pop[[L1]]{{$}}
349; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L2]]{{$}}
350; CHECK-NEXT: return $pop[[R]]{{$}}
351define <4 x float> @select_cmp_v4f32(i32 %i, <4 x float> %x, <4 x float> %y) {
352 %c = icmp slt i32 %i, 0
353 %res = select i1 %c, <4 x float> %x, <4 x float> %y
354 ret <4 x float> %res
355}
356
357; CHECK-LABEL: select_ne_v4f32:
358; CHECK-NEXT: .param i32, v128, v128{{$}}
359; CHECK-NEXT: .result v128{{$}}
360; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, -1{{$}}
361; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 0{{$}}
362; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
363; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
364; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
365; CHECK-NEXT: return $pop[[R]]{{$}}
366define <4 x float> @select_ne_v4f32(i32 %i, <4 x float> %x, <4 x float> %y) {
367 %c = icmp ne i32 %i, 0
368 %res = select i1 %c, <4 x float> %x, <4 x float> %y
369 ret <4 x float> %res
370}
371
372; CHECK-LABEL: select_eq_v4f32:
373; CHECK-NEXT: .param i32, v128, v128{{$}}
374; CHECK-NEXT: .result v128{{$}}
375; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 0{{$}}
376; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, -1{{$}}
377; CHECK-NEXT: i32.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
378; CHECK-NEXT: i32x4.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
379; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
380; CHECK-NEXT: return $pop[[R]]{{$}}
381define <4 x float> @select_eq_v4f32(i32 %i, <4 x float> %x, <4 x float> %y) {
382 %c = icmp eq i32 %i, 0
383 %res = select i1 %c, <4 x float> %x, <4 x float> %y
384 ret <4 x float> %res
385}
386
387; ==============================================================================
388; 2 x double
389; ==============================================================================
390; CHECK-LABEL: vselect_v2f64:
391; CHECK-NEXT: .param v128, v128, v128{{$}}
392; CHECK-NEXT: .result v128{{$}}
393; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 63{{$}}
394; CHECK-NEXT: i64x2.shl $push[[L1:[0-9]+]]=, $0, $pop[[L0]]{{$}}
395; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 63{{$}}
396; CHECK-NEXT: i64x2.shr_s $push[[L3:[0-9]+]]=, $pop[[L1]], $pop[[L2]]{{$}}
397; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
398; CHECK-NEXT: return $pop[[R]]{{$}}
399define <2 x double> @vselect_v2f64(<2 x i1> %c, <2 x double> %x, <2 x double> %y) {
400 %res = select <2 x i1> %c, <2 x double> %x, <2 x double> %y
401 ret <2 x double> %res
402}
403
404; CHECK-LABEL: select_v2f64:
405; CHECK-NEXT: .param i32, v128, v128{{$}}
406; CHECK-NEXT: .result v128{{$}}
407; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
408; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
409; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
410; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
411; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
412; CHECK-NEXT: return $pop[[R]]{{$}}
413define <2 x double> @select_v2f64(i1 %c, <2 x double> %x, <2 x double> %y) {
414 %res = select i1 %c, <2 x double> %x, <2 x double> %y
415 ret <2 x double> %res
416}
417
418; CHECK-LABEL: select_cmp_v2f64:
419; CHECK-NEXT: .param i32, v128, v128{{$}}
420; CHECK-NEXT: .result v128{{$}}
421; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
422; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
423; CHECK-NEXT: i32.const $push[[L2:[0-9]+]]=, 0{{$}}
424; CHECK-NEXT: i32.lt_s $push[[L3:[0-9]+]]=, $0, $pop[[L2]]{{$}}
425; CHECK-NEXT: i64.select $push[[L4:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $pop[[L3]]{{$}}
426; CHECK-NEXT: i64x2.splat $push[[L5:[0-9]+]]=, $pop[[L4]]{{$}}
427; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L5]]{{$}}
428; CHECK-NEXT: return $pop[[R]]{{$}}
429define <2 x double> @select_cmp_v2f64(i32 %i, <2 x double> %x, <2 x double> %y) {
430 %c = icmp slt i32 %i, 0
431 %res = select i1 %c, <2 x double> %x, <2 x double> %y
432 ret <2 x double> %res
433}
434
435; CHECK-LABEL: select_ne_v2f64:
436; CHECK-NEXT: .param i32, v128, v128{{$}}
437; CHECK-NEXT: .result v128{{$}}
438; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, -1{{$}}
439; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, 0{{$}}
440; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
441; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
442; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
443; CHECK-NEXT: return $pop[[R]]{{$}}
444define <2 x double> @select_ne_v2f64(i32 %i, <2 x double> %x, <2 x double> %y) {
445 %c = icmp ne i32 %i, 0
446 %res = select i1 %c, <2 x double> %x, <2 x double> %y
447 ret <2 x double> %res
448}
449
450; CHECK-LABEL: select_eq_v2f64:
451; CHECK-NEXT: .param i32, v128, v128{{$}}
452; CHECK-NEXT: .result v128{{$}}
453; CHECK-NEXT: i64.const $push[[L0:[0-9]+]]=, 0{{$}}
454; CHECK-NEXT: i64.const $push[[L1:[0-9]+]]=, -1{{$}}
455; CHECK-NEXT: i64.select $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $0{{$}}
456; CHECK-NEXT: i64x2.splat $push[[L3:[0-9]+]]=, $pop[[L2]]{{$}}
457; CHECK-NEXT: v128.bitselect $push[[R:[0-9]+]]=, $1, $2, $pop[[L3]]{{$}}
458; CHECK-NEXT: return $pop[[R]]{{$}}
459define <2 x double> @select_eq_v2f64(i32 %i, <2 x double> %x, <2 x double> %y) {
460 %c = icmp eq i32 %i, 0
461 %res = select i1 %c, <2 x double> %x, <2 x double> %y
462 ret <2 x double> %res
463}