blob: a812a7d966598f2af2b138774fbf4aece48f2e9a [file] [log] [blame]
Krzysztof Parzyszek952d9512015-04-22 21:17:00 +00001; RUN: llc -march=hexagon -mcpu=hexagonv5 -disable-hexagon-misched < %s \
2; RUN: | FileCheck %s
Sirish Pande4bd20c52012-05-12 05:10:30 +00003; Check that we generate new value jump, both registers, with one
4; of the registers as new.
5
Krzysztof Parzyszek952d9512015-04-22 21:17:00 +00006@Reg = common global i32 0, align 4
Sirish Pande4bd20c52012-05-12 05:10:30 +00007define i32 @main() nounwind {
8entry:
Krzysztof Parzyszek952d9512015-04-22 21:17:00 +00009; CHECK: if (cmp.gt(r{{[0-9]+}}, r{{[0-9]+}}.new)) jump:{{[t|nt]}} .LBB{{[0-9]+}}_{{[0-9]+}}
10 %Reg2 = alloca i32, align 4
11 %0 = load i32, i32* %Reg2, align 4
12 %1 = load i32, i32* @Reg, align 4
13 %tobool = icmp sle i32 %0, %1
Sirish Pande4bd20c52012-05-12 05:10:30 +000014 br i1 %tobool, label %if.then, label %if.else
15
16if.then:
17 call void @bar(i32 1, i32 2)
18 br label %if.end
19
20if.else:
21 call void @baz(i32 10, i32 20)
22 br label %if.end
23
24if.end:
25 ret i32 0
26}
27
28declare void @bar(i32, i32)
29declare void @baz(i32, i32)