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gerrit-public.fairphone.software / toolchain / llvm-project / b4ddc0845ab5260023e9afa3f7bc71a0bc731ae6 / . / llvm / test / CodeGen / Thumb2 / cross-rc-coalescing-2.ll
blob: 88c7f0f17ab91e23eb18036d948ead25bb778dea [file] [log] [blame]
Tim Northoverb4ddc082014-05-30 10:09:59 +0000[diff] [blame^]1; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -arm-atomic-cfg-tidy=0 | FileCheck %s
Evan Cheng69140ec2009-10-25 08:01:41 +0000[diff] [blame]2
Rafael Espindola29dda212010-06-17 15:18:27 +0000[diff] [blame]3define void @fht(float* nocapture %fz, i16 signext %n) nounwind {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]4; CHECK-LABEL: fht:
Evan Cheng69140ec2009-10-25 08:01:41 +0000[diff] [blame]5entry:
6 br label %bb5
7
8bb5: ; preds = %bb5, %entry
9 br i1 undef, label %bb5, label %bb.nph
10
11bb.nph: ; preds = %bb5
12 br label %bb7
13
Evan Cheng87066f02010-10-20 22:03:58 +0000[diff] [blame]14; Loop preheader
15; CHECK: vmov.f32
Evan Cheng69140ec2009-10-25 08:01:41 +0000[diff] [blame]16bb7: ; preds = %bb9, %bb.nph
17 %s1.02 = phi float [ undef, %bb.nph ], [ %35, %bb9 ] ; <float> [#uses=3]
18 %tmp79 = add i32 undef, undef ; <i32> [#uses=1]
19 %tmp53 = sub i32 undef, undef ; <i32> [#uses=1]
20 %0 = fadd float 0.000000e+00, 1.000000e+00 ; <float> [#uses=2]
21 %1 = fmul float 0.000000e+00, 0.000000e+00 ; <float> [#uses=2]
22 br label %bb8
23
24bb8: ; preds = %bb8, %bb7
Evan Cheng87066f02010-10-20 22:03:58 +0000[diff] [blame]25; CHECK: %bb8
26; CHECK-NOT: vmov.f32
27; CHECK: blt
Evan Cheng69140ec2009-10-25 08:01:41 +0000[diff] [blame]28 %tmp54 = add i32 0, %tmp53 ; <i32> [#uses=0]
29 %fi.1 = getelementptr float* %fz, i32 undef ; <float*> [#uses=2]
30 %tmp80 = add i32 0, %tmp79 ; <i32> [#uses=1]
31 %scevgep81 = getelementptr float* %fz, i32 %tmp80 ; <float*> [#uses=1]
32 %2 = load float* undef, align 4 ; <float> [#uses=1]
33 %3 = fmul float %2, %1 ; <float> [#uses=1]
34 %4 = load float* null, align 4 ; <float> [#uses=2]
35 %5 = fmul float %4, %0 ; <float> [#uses=1]
36 %6 = fsub float %3, %5 ; <float> [#uses=1]
37 %7 = fmul float %4, %1 ; <float> [#uses=1]
38 %8 = fadd float undef, %7 ; <float> [#uses=2]
39 %9 = load float* %fi.1, align 4 ; <float> [#uses=2]
40 %10 = fsub float %9, %8 ; <float> [#uses=1]
41 %11 = fadd float %9, %8 ; <float> [#uses=1]
42 %12 = fsub float 0.000000e+00, %6 ; <float> [#uses=1]
43 %13 = fsub float 0.000000e+00, undef ; <float> [#uses=2]
44 %14 = fmul float undef, %0 ; <float> [#uses=1]
45 %15 = fadd float %14, undef ; <float> [#uses=2]
46 %16 = load float* %scevgep81, align 4 ; <float> [#uses=2]
47 %17 = fsub float %16, %15 ; <float> [#uses=1]
48 %18 = fadd float %16, %15 ; <float> [#uses=2]
49 %19 = load float* undef, align 4 ; <float> [#uses=2]
50 %20 = fsub float %19, %13 ; <float> [#uses=2]
51 %21 = fadd float %19, %13 ; <float> [#uses=1]
52 %22 = fmul float %s1.02, %18 ; <float> [#uses=1]
53 %23 = fmul float 0.000000e+00, %20 ; <float> [#uses=1]
54 %24 = fsub float %22, %23 ; <float> [#uses=1]
55 %25 = fmul float 0.000000e+00, %18 ; <float> [#uses=1]
56 %26 = fmul float %s1.02, %20 ; <float> [#uses=1]
57 %27 = fadd float %25, %26 ; <float> [#uses=1]
58 %28 = fadd float %11, %27 ; <float> [#uses=1]
59 store float %28, float* %fi.1, align 4
60 %29 = fadd float %12, %24 ; <float> [#uses=1]
61 store float %29, float* null, align 4
62 %30 = fmul float 0.000000e+00, %21 ; <float> [#uses=1]
63 %31 = fmul float %s1.02, %17 ; <float> [#uses=1]
64 %32 = fsub float %30, %31 ; <float> [#uses=1]
65 %33 = fsub float %10, %32 ; <float> [#uses=1]
66 store float %33, float* undef, align 4
67 %34 = icmp slt i32 undef, undef ; <i1> [#uses=1]
68 br i1 %34, label %bb8, label %bb9
69
70bb9: ; preds = %bb8
Evan Cheng69140ec2009-10-25 08:01:41 +0000[diff] [blame]71 %35 = fadd float 0.000000e+00, undef ; <float> [#uses=1]
72 br label %bb7
73}