Michel Danzer | 7bbd7aa | 2013-05-08 13:07:29 +0000 | [diff] [blame] | 1 | ;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s |
| 2 | |
| 3 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 15, 0, 0, -1 |
| 4 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+}}, 3, 0, 0, 0 |
| 5 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+}}, 2, 0, 0, 0 |
| 6 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+}}, 1, 0, 0, 0 |
| 7 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+}}, 4, 0, 0, 0 |
| 8 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+}}, 8, 0, 0, 0 |
| 9 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+}}, 5, 0, 0, 0 |
| 10 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+}}, 9, 0, 0, 0 |
| 11 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+}}, 6, 0, 0, 0 |
| 12 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+}}, 10, 0, 0, -1 |
| 13 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+}}, 12, 0, 0, -1 |
| 14 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 7, 0, 0, 0 |
| 15 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 11, 0, 0, 0 |
| 16 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 13, 0, 0, 0 |
| 17 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 14, 0, 0, 0 |
| 18 | ;CHECK: IMAGE_GET_RESINFO {{VGPR[0-9]+}}, 8, 0, 0, -1 |
| 19 | |
| 20 | define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, |
| 21 | i32 %a9, i32 %a10, i32 %a11, i32 %a12, i32 %a13, i32 %a14, i32 %a15, i32 %a16) { |
Tom Stellard | b81df0c | 2013-08-14 23:24:37 +0000 | [diff] [blame^] | 22 | %res1 = call <4 x i32> @llvm.SI.resinfo(i32 %a1, <32 x i8> undef, i32 1) |
| 23 | %res2 = call <4 x i32> @llvm.SI.resinfo(i32 %a2, <32 x i8> undef, i32 2) |
| 24 | %res3 = call <4 x i32> @llvm.SI.resinfo(i32 %a3, <32 x i8> undef, i32 3) |
| 25 | %res4 = call <4 x i32> @llvm.SI.resinfo(i32 %a4, <32 x i8> undef, i32 4) |
| 26 | %res5 = call <4 x i32> @llvm.SI.resinfo(i32 %a5, <32 x i8> undef, i32 5) |
| 27 | %res6 = call <4 x i32> @llvm.SI.resinfo(i32 %a6, <32 x i8> undef, i32 6) |
| 28 | %res7 = call <4 x i32> @llvm.SI.resinfo(i32 %a7, <32 x i8> undef, i32 7) |
| 29 | %res8 = call <4 x i32> @llvm.SI.resinfo(i32 %a8, <32 x i8> undef, i32 8) |
| 30 | %res9 = call <4 x i32> @llvm.SI.resinfo(i32 %a9, <32 x i8> undef, i32 9) |
| 31 | %res10 = call <4 x i32> @llvm.SI.resinfo(i32 %a10, <32 x i8> undef, i32 10) |
| 32 | %res11 = call <4 x i32> @llvm.SI.resinfo(i32 %a11, <32 x i8> undef, i32 11) |
| 33 | %res12 = call <4 x i32> @llvm.SI.resinfo(i32 %a12, <32 x i8> undef, i32 12) |
| 34 | %res13 = call <4 x i32> @llvm.SI.resinfo(i32 %a13, <32 x i8> undef, i32 13) |
| 35 | %res14 = call <4 x i32> @llvm.SI.resinfo(i32 %a14, <32 x i8> undef, i32 14) |
| 36 | %res15 = call <4 x i32> @llvm.SI.resinfo(i32 %a15, <32 x i8> undef, i32 15) |
| 37 | %res16 = call <4 x i32> @llvm.SI.resinfo(i32 %a16, <32 x i8> undef, i32 16) |
Michel Danzer | 7bbd7aa | 2013-05-08 13:07:29 +0000 | [diff] [blame] | 38 | %e1 = extractelement <4 x i32> %res1, i32 0 |
| 39 | %e2 = extractelement <4 x i32> %res2, i32 1 |
| 40 | %e3 = extractelement <4 x i32> %res3, i32 2 |
| 41 | %e4 = extractelement <4 x i32> %res4, i32 3 |
| 42 | %t0 = extractelement <4 x i32> %res5, i32 0 |
| 43 | %t1 = extractelement <4 x i32> %res5, i32 1 |
| 44 | %e5 = add i32 %t0, %t1 |
| 45 | %t2 = extractelement <4 x i32> %res6, i32 0 |
| 46 | %t3 = extractelement <4 x i32> %res6, i32 2 |
| 47 | %e6 = add i32 %t2, %t3 |
| 48 | %t4 = extractelement <4 x i32> %res7, i32 0 |
| 49 | %t5 = extractelement <4 x i32> %res7, i32 3 |
| 50 | %e7 = add i32 %t4, %t5 |
| 51 | %t6 = extractelement <4 x i32> %res8, i32 1 |
| 52 | %t7 = extractelement <4 x i32> %res8, i32 2 |
| 53 | %e8 = add i32 %t6, %t7 |
| 54 | %t8 = extractelement <4 x i32> %res9, i32 1 |
| 55 | %t9 = extractelement <4 x i32> %res9, i32 3 |
| 56 | %e9 = add i32 %t8, %t9 |
| 57 | %t10 = extractelement <4 x i32> %res10, i32 2 |
| 58 | %t11 = extractelement <4 x i32> %res10, i32 3 |
| 59 | %e10 = add i32 %t10, %t11 |
| 60 | %t12 = extractelement <4 x i32> %res11, i32 0 |
| 61 | %t13 = extractelement <4 x i32> %res11, i32 1 |
| 62 | %t14 = extractelement <4 x i32> %res11, i32 2 |
| 63 | %t15 = add i32 %t12, %t13 |
| 64 | %e11 = add i32 %t14, %t15 |
| 65 | %t16 = extractelement <4 x i32> %res12, i32 0 |
| 66 | %t17 = extractelement <4 x i32> %res12, i32 1 |
| 67 | %t18 = extractelement <4 x i32> %res12, i32 3 |
| 68 | %t19 = add i32 %t16, %t17 |
| 69 | %e12 = add i32 %t18, %t19 |
| 70 | %t20 = extractelement <4 x i32> %res13, i32 0 |
| 71 | %t21 = extractelement <4 x i32> %res13, i32 2 |
| 72 | %t22 = extractelement <4 x i32> %res13, i32 3 |
| 73 | %t23 = add i32 %t20, %t21 |
| 74 | %e13 = add i32 %t22, %t23 |
| 75 | %t24 = extractelement <4 x i32> %res14, i32 1 |
| 76 | %t25 = extractelement <4 x i32> %res14, i32 2 |
| 77 | %t26 = extractelement <4 x i32> %res14, i32 3 |
| 78 | %t27 = add i32 %t24, %t25 |
| 79 | %e14 = add i32 %t26, %t27 |
| 80 | %t28 = extractelement <4 x i32> %res15, i32 0 |
| 81 | %t29 = extractelement <4 x i32> %res15, i32 1 |
| 82 | %t30 = extractelement <4 x i32> %res15, i32 2 |
| 83 | %t31 = extractelement <4 x i32> %res15, i32 3 |
| 84 | %t32 = add i32 %t28, %t29 |
| 85 | %t33 = add i32 %t30, %t31 |
| 86 | %e15 = add i32 %t32, %t33 |
| 87 | %e16 = extractelement <4 x i32> %res16, i32 3 |
| 88 | %s1 = add i32 %e1, %e2 |
| 89 | %s2 = add i32 %s1, %e3 |
| 90 | %s3 = add i32 %s2, %e4 |
| 91 | %s4 = add i32 %s3, %e5 |
| 92 | %s5 = add i32 %s4, %e6 |
| 93 | %s6 = add i32 %s5, %e7 |
| 94 | %s7 = add i32 %s6, %e8 |
| 95 | %s8 = add i32 %s7, %e9 |
| 96 | %s9 = add i32 %s8, %e10 |
| 97 | %s10 = add i32 %s9, %e11 |
| 98 | %s11 = add i32 %s10, %e12 |
| 99 | %s12 = add i32 %s11, %e13 |
| 100 | %s13 = add i32 %s12, %e14 |
| 101 | %s14 = add i32 %s13, %e15 |
| 102 | %s15 = add i32 %s14, %e16 |
| 103 | %s16 = bitcast i32 %s15 to float |
| 104 | call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %s16, float %s16, float %s16, float %s16) |
| 105 | ret void |
| 106 | } |
| 107 | |
Tom Stellard | b81df0c | 2013-08-14 23:24:37 +0000 | [diff] [blame^] | 108 | declare <4 x i32> @llvm.SI.resinfo(i32, <32 x i8>, i32) readnone |
Michel Danzer | 7bbd7aa | 2013-05-08 13:07:29 +0000 | [diff] [blame] | 109 | |
| 110 | declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) |