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Matt Arsenaultd82c1832013-11-10 01:03:59 +00001//===-- AMDGPUAsmPrinter.h - Print AMDGPU assembly code ---------*- C++ -*-===//
Tom Stellard75aadc22012-12-11 21:25:42 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief AMDGPU Assembly printer class.
12//
13//===----------------------------------------------------------------------===//
14
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000015#ifndef LLVM_LIB_TARGET_R600_AMDGPUASMPRINTER_H
16#define LLVM_LIB_TARGET_R600_AMDGPUASMPRINTER_H
Tom Stellard75aadc22012-12-11 21:25:42 +000017
18#include "llvm/CodeGen/AsmPrinter.h"
Tom Stellarded699252013-10-12 05:02:51 +000019#include <vector>
Tom Stellard75aadc22012-12-11 21:25:42 +000020
21namespace llvm {
22
23class AMDGPUAsmPrinter : public AsmPrinter {
Matt Arsenault89cc49f2013-12-05 05:15:35 +000024private:
25 struct SIProgramInfo {
Matt Arsenaulte500e322014-04-15 22:40:47 +000026 SIProgramInfo() :
Tom Stellard4df465b2014-12-02 21:28:53 +000027 VGPRBlocks(0),
28 SGPRBlocks(0),
Matt Arsenault0989d512014-06-26 17:22:30 +000029 Priority(0),
30 FloatMode(0),
31 Priv(0),
32 DX10Clamp(0),
33 DebugMode(0),
34 IEEEMode(0),
Tom Stellardb02094e2014-07-21 15:45:01 +000035 ScratchSize(0),
Tom Stellard4df465b2014-12-02 21:28:53 +000036 ComputePGMRSrc1(0),
37 LDSBlocks(0),
38 ScratchBlocks(0),
39 ComputePGMRSrc2(0),
40 NumVGPR(0),
41 NumSGPR(0),
Matt Arsenault3f981402014-09-15 15:41:53 +000042 FlatUsed(false),
43 VCCUsed(false),
Matt Arsenault0989d512014-06-26 17:22:30 +000044 CodeLen(0) {}
Matt Arsenaulte500e322014-04-15 22:40:47 +000045
Matt Arsenault0989d512014-06-26 17:22:30 +000046 // Fields set in PGM_RSRC1 pm4 packet.
Tom Stellard4df465b2014-12-02 21:28:53 +000047 uint32_t VGPRBlocks;
48 uint32_t SGPRBlocks;
Matt Arsenault0989d512014-06-26 17:22:30 +000049 uint32_t Priority;
50 uint32_t FloatMode;
51 uint32_t Priv;
52 uint32_t DX10Clamp;
53 uint32_t DebugMode;
54 uint32_t IEEEMode;
Tom Stellardb02094e2014-07-21 15:45:01 +000055 uint32_t ScratchSize;
Matt Arsenault0989d512014-06-26 17:22:30 +000056
Tom Stellard4df465b2014-12-02 21:28:53 +000057 uint64_t ComputePGMRSrc1;
58
59 // Fields set in PGM_RSRC2 pm4 packet.
60 uint32_t LDSBlocks;
61 uint32_t ScratchBlocks;
62
63 uint64_t ComputePGMRSrc2;
64
65 uint32_t NumVGPR;
66 uint32_t NumSGPR;
67 uint32_t LDSSize;
Matt Arsenault3f981402014-09-15 15:41:53 +000068 bool FlatUsed;
69
Matt Arsenault0989d512014-06-26 17:22:30 +000070 // Bonus information for debugging.
Matt Arsenault3f981402014-09-15 15:41:53 +000071 bool VCCUsed;
Matt Arsenaulte500e322014-04-15 22:40:47 +000072 uint64_t CodeLen;
Matt Arsenault89cc49f2013-12-05 05:15:35 +000073 };
74
Matt Arsenaultd32dbb62014-07-13 03:06:43 +000075 void getSIProgramInfo(SIProgramInfo &Out, const MachineFunction &MF) const;
76 void findNumUsedRegistersSI(const MachineFunction &MF,
Matt Arsenault89cc49f2013-12-05 05:15:35 +000077 unsigned &NumSGPR,
78 unsigned &NumVGPR) const;
79
80 /// \brief Emit register usage information so that the GPU driver
81 /// can correctly setup the GPU state.
Matt Arsenaultd32dbb62014-07-13 03:06:43 +000082 void EmitProgramInfoR600(const MachineFunction &MF);
83 void EmitProgramInfoSI(const MachineFunction &MF, const SIProgramInfo &KernelInfo);
Tom Stellardb8fd6ef2014-12-02 22:00:07 +000084 void EmitAmdKernelCodeT(const MachineFunction &MF,
85 const SIProgramInfo &KernelInfo) const;
Tom Stellard75aadc22012-12-11 21:25:42 +000086
87public:
Tom Stellarded699252013-10-12 05:02:51 +000088 explicit AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer);
Tom Stellard75aadc22012-12-11 21:25:42 +000089
Craig Topper5656db42014-04-29 07:57:24 +000090 bool runOnMachineFunction(MachineFunction &MF) override;
Tom Stellard75aadc22012-12-11 21:25:42 +000091
Craig Topper5656db42014-04-29 07:57:24 +000092 const char *getPassName() const override {
Tom Stellard75aadc22012-12-11 21:25:42 +000093 return "AMDGPU Assembly Printer";
94 }
95
Tom Stellard75aadc22012-12-11 21:25:42 +000096 /// Implemented in AMDGPUMCInstLower.cpp
Craig Topper5656db42014-04-29 07:57:24 +000097 void EmitInstruction(const MachineInstr *MI) override;
Tom Stellarded699252013-10-12 05:02:51 +000098
Tom Stellard067c8152014-07-21 14:01:14 +000099 void EmitEndOfAsmFile(Module &M) override;
100
Tom Stellarded699252013-10-12 05:02:51 +0000101protected:
102 bool DisasmEnabled;
103 std::vector<std::string> DisasmLines, HexLines;
104 size_t DisasmLineMaxLen;
Tom Stellard75aadc22012-12-11 21:25:42 +0000105};
106
107} // End anonymous llvm
108
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000109#endif