| Tim Northover | 00ed996 | 2014-03-29 10:18:08 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -mtriple=arm64-apple-darwin |
| 2 | |
| 3 | ; Can't copy or spill / restore CPSR. |
| 4 | ; rdar://9105206 |
| 5 | |
| 6 | define fastcc void @t() ssp align 2 { |
| 7 | entry: |
| 8 | br i1 undef, label %bb3.i, label %bb2.i |
| 9 | |
| 10 | bb2.i: ; preds = %entry |
| 11 | br label %bb3.i |
| 12 | |
| 13 | bb3.i: ; preds = %bb2.i, %entry |
| 14 | br i1 undef, label %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71, label %bb.i69 |
| 15 | |
| 16 | bb.i69: ; preds = %bb3.i |
| 17 | br label %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71 |
| 18 | |
| 19 | _ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71: ; preds = %bb.i69, %bb3.i |
| 20 | %0 = select i1 undef, float 0.000000e+00, float undef |
| 21 | %1 = fdiv float %0, undef |
| 22 | %2 = fcmp ult float %1, 0xBF847AE140000000 |
| 23 | %storemerge9 = select i1 %2, float %1, float 0.000000e+00 |
| 24 | store float %storemerge9, float* undef, align 4 |
| 25 | br i1 undef, label %bb42, label %bb47 |
| 26 | |
| 27 | bb42: ; preds = %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71 |
| 28 | br i1 undef, label %bb46, label %bb53 |
| 29 | |
| 30 | bb46: ; preds = %bb42 |
| 31 | br label %bb48 |
| 32 | |
| 33 | bb47: ; preds = %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71 |
| 34 | br label %bb48 |
| 35 | |
| 36 | bb48: ; preds = %bb47, %bb46 |
| 37 | br i1 undef, label %bb1.i14, label %bb.i13 |
| 38 | |
| 39 | bb.i13: ; preds = %bb48 |
| 40 | br label %bb1.i14 |
| 41 | |
| 42 | bb1.i14: ; preds = %bb.i13, %bb48 |
| 43 | br label %bb53 |
| 44 | |
| 45 | bb53: ; preds = %bb1.i14, %bb42 |
| 46 | ret void |
| 47 | } |