| Anton Korobeynikov | 0a69176 | 2012-10-17 17:37:11 +0000 | [diff] [blame] | 1 | ; RUN: llc -O0 -disable-fp-elim < %s | FileCheck %s |
| 2 | |
| 3 | target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16" |
| 4 | target triple = "msp430---elf" |
| 5 | |
| 6 | define void @fp() nounwind { |
| 7 | entry: |
| Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 8 | ; CHECK-LABEL: fp: |
| Anton Korobeynikov | 0a69176 | 2012-10-17 17:37:11 +0000 | [diff] [blame] | 9 | ; CHECK: push.w r4 |
| 10 | ; CHECK: mov.w r1, r4 |
| 11 | ; CHECK: sub.w #2, r1 |
| 12 | %i = alloca i16, align 2 |
| 13 | ; CHECK: mov.w #0, -2(r4) |
| 14 | store i16 0, i16* %i, align 2 |
| 15 | ; CHECK: pop.w r4 |
| 16 | ret void |
| 17 | } |
| Job Noorman | f7da105 | 2014-04-02 13:13:56 +0000 | [diff] [blame] | 18 | |
| 19 | ; Due to FPB not being marked as reserved, the register allocator used to select |
| 20 | ; r4 as the register for the "r" constraint below. This test verifies that this |
| 21 | ; does not happen anymore. Note that the only reason an ISR is used here is that |
| 22 | ; the register allocator selects r4 first instead of fifth in a normal function. |
| 23 | define msp430_intrcc void @fpb_alloced() #0 { |
| Nico Rieck | bd15945 | 2014-05-23 19:06:24 +0000 | [diff] [blame] | 24 | ; CHECK-LABEL: fpb_alloced: |
| Job Noorman | f7da105 | 2014-04-02 13:13:56 +0000 | [diff] [blame] | 25 | ; CHECK-NOT: mov.b #0, r4 |
| 26 | ; CHECK: nop |
| 27 | call void asm sideeffect "nop", "r"(i8 0) |
| 28 | ret void |
| 29 | } |