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gerrit-public.fairphone.software / toolchain / llvm-project / b9c1b51e45b845debb76d8658edabca70ca56079 / . / llvm / test / CodeGen / SystemZ / atomicrmw-add-04.ll
blob: e7905491f2e0e65822f5226e624e4b7d2da0d086 [file] [log] [blame]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]1; Test 64-bit atomic additions.
2;
Richard Sandifordc575df62013-07-19 16:26:39 +0000[diff] [blame]3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]4
5; Check addition of a variable.
6define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]7; CHECK-LABEL: f1:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]8; CHECK: lg %r2, 0(%r3)
9; CHECK: [[LABEL:\.[^:]*]]:
10; CHECK: lgr %r0, %r2
11; CHECK: agr %r0, %r4
12; CHECK: csg %r2, %r0, 0(%r3)
Richard Sandiford3d768e32013-07-31 12:30:20 +0000[diff] [blame]13; CHECK: jl [[LABEL]]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]14; CHECK: br %r14
15 %res = atomicrmw add i64 *%src, i64 %b seq_cst
16 ret i64 %res
17}
18
19; Check addition of 1, which can use AGHI.
20define i64 @f2(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]21; CHECK-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]22; CHECK: lg %r2, 0(%r3)
23; CHECK: [[LABEL:\.[^:]*]]:
24; CHECK: lgr %r0, %r2
25; CHECK: aghi %r0, 1
26; CHECK: csg %r2, %r0, 0(%r3)
Richard Sandiford3d768e32013-07-31 12:30:20 +0000[diff] [blame]27; CHECK: jl [[LABEL]]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]28; CHECK: br %r14
29 %res = atomicrmw add i64 *%src, i64 1 seq_cst
30 ret i64 %res
31}
32
33; Check the high end of the AGHI range.
34define i64 @f3(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]35; CHECK-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]36; CHECK: aghi %r0, 32767
37; CHECK: br %r14
38 %res = atomicrmw add i64 *%src, i64 32767 seq_cst
39 ret i64 %res
40}
41
42; Check the next value up, which must use AGFI.
43define i64 @f4(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]44; CHECK-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]45; CHECK: agfi %r0, 32768
46; CHECK: br %r14
47 %res = atomicrmw add i64 *%src, i64 32768 seq_cst
48 ret i64 %res
49}
50
51; Check the high end of the AGFI range.
52define i64 @f5(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]53; CHECK-LABEL: f5:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]54; CHECK: agfi %r0, 2147483647
55; CHECK: br %r14
56 %res = atomicrmw add i64 *%src, i64 2147483647 seq_cst
57 ret i64 %res
58}
59
60; Check the next value up, which must use a register addition.
61define i64 @f6(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]62; CHECK-LABEL: f6:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]63; CHECK: agr
64; CHECK: br %r14
65 %res = atomicrmw add i64 *%src, i64 2147483648 seq_cst
66 ret i64 %res
67}
68
69; Check addition of -1, which can use AGHI.
70define i64 @f7(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]71; CHECK-LABEL: f7:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]72; CHECK: aghi %r0, -1
73; CHECK: br %r14
74 %res = atomicrmw add i64 *%src, i64 -1 seq_cst
75 ret i64 %res
76}
77
78; Check the low end of the AGHI range.
79define i64 @f8(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]80; CHECK-LABEL: f8:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]81; CHECK: aghi %r0, -32768
82; CHECK: br %r14
83 %res = atomicrmw add i64 *%src, i64 -32768 seq_cst
84 ret i64 %res
85}
86
87; Check the next value down, which must use AGFI instead.
88define i64 @f9(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]89; CHECK-LABEL: f9:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]90; CHECK: agfi %r0, -32769
91; CHECK: br %r14
92 %res = atomicrmw add i64 *%src, i64 -32769 seq_cst
93 ret i64 %res
94}
95
96; Check the low end of the AGFI range.
97define i64 @f10(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]98; CHECK-LABEL: f10:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]99; CHECK: agfi %r0, -2147483648
100; CHECK: br %r14
101 %res = atomicrmw add i64 *%src, i64 -2147483648 seq_cst
102 ret i64 %res
103}
104
105; Check the next value down, which must use a register addition.
106define i64 @f11(i64 %dummy, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]107; CHECK-LABEL: f11:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]108; CHECK: agr
109; CHECK: br %r14
110 %res = atomicrmw add i64 *%src, i64 -2147483649 seq_cst
111 ret i64 %res
112}