blob: 1c44e17edbd85afa12e3dc16de02cd93e1da5932 [file] [log] [blame]
Sanjay Patel246e7f72016-03-25 17:16:32 +00001; NOTE: Assertions have been autogenerated by update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4define void @hang_2002-03-11(i32 %X) {
5; CHECK-LABEL: @hang_2002-03-11(
Sanjay Patel6ecf1b62016-04-05 17:24:54 +00006; CHECK-NEXT: ret void
Sanjay Patel246e7f72016-03-25 17:16:32 +00007;
8 %reg117 = add i32 %X, 0
9 ret void
10}
11
12; Instcombine was missing a test that caused it to make illegal transformations
13; sometimes. In this case, it transformed the sub into an add:
14
15define i32 @sub_failure_2002-05-14(i32 %i, i32 %j) {
16; CHECK-LABEL: @sub_failure_2002-05-14(
Sanjay Patel6ecf1b62016-04-05 17:24:54 +000017; CHECK-NEXT: [[A:%.*]] = mul i32 %i, %j
Sanjay Patel246e7f72016-03-25 17:16:32 +000018; CHECK-NEXT: [[B:%.*]] = sub i32 2, [[A]]
19; CHECK-NEXT: ret i32 [[B]]
20;
21 %A = mul i32 %i, %j
22 %B = sub i32 2, %A
23 ret i32 %B
24}
25
26; This testcase was incorrectly getting completely eliminated. There should be
27; SOME instruction named %c here, even if it's a bitwise and.
28
29define i64 @cast_test_2002-08-02(i64 %A) {
30; CHECK-LABEL: @cast_test_2002-08-02(
Sanjay Patel6ecf1b62016-04-05 17:24:54 +000031; CHECK-NEXT: [[C2:%.*]] = and i64 %A, 255
Sanjay Patel246e7f72016-03-25 17:16:32 +000032; CHECK-NEXT: ret i64 [[C2]]
33;
34 %c1 = trunc i64 %A to i8
35 %c2 = zext i8 %c1 to i64
36 ret i64 %c2
37}
38
39define i32 @missed_const_prop_2002-12-05(i32 %A) {
40; CHECK-LABEL: @missed_const_prop_2002-12-05(
Sanjay Patel6ecf1b62016-04-05 17:24:54 +000041; CHECK-NEXT: ret i32 0
Sanjay Patel246e7f72016-03-25 17:16:32 +000042;
43 %A.neg = sub i32 0, %A
44 %.neg = sub i32 0, 1
45 %X = add i32 %.neg, 1
46 %Y.neg.ra = add i32 %A, %X
47 %r = add i32 %A.neg, %Y.neg.ra
48 ret i32 %r
49}
50