Wei Mi | b086289 | 2017-09-22 16:30:00 +0000 | [diff] [blame] | 1 | // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s |
| 2 | // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s |
| 3 | // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s |
Alexey Bataev | a8a9153a | 2017-12-29 18:07:07 +0000 | [diff] [blame] | 4 | |
| 5 | // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s |
| 6 | // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s |
| 7 | // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s |
| 8 | // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 9 | // expected-no-diagnostics |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 10 | #ifndef HEADER |
| 11 | #define HEADER |
| 12 | |
| 13 | _Bool bv, bx; |
| 14 | char cv, cx; |
| 15 | unsigned char ucv, ucx; |
| 16 | short sv, sx; |
| 17 | unsigned short usv, usx; |
| 18 | int iv, ix; |
| 19 | unsigned int uiv, uix; |
| 20 | long lv, lx; |
| 21 | unsigned long ulv, ulx; |
| 22 | long long llv, llx; |
| 23 | unsigned long long ullv, ullx; |
| 24 | float fv, fx; |
| 25 | double dv, dx; |
| 26 | long double ldv, ldx; |
| 27 | _Complex int civ, cix; |
| 28 | _Complex float cfv, cfx; |
| 29 | _Complex double cdv, cdx; |
| 30 | |
| 31 | typedef int int4 __attribute__((__vector_size__(16))); |
| 32 | int4 int4x; |
| 33 | |
| 34 | struct BitFields { |
| 35 | int : 32; |
| 36 | int a : 31; |
| 37 | } bfx; |
| 38 | |
| 39 | struct BitFields_packed { |
| 40 | int : 32; |
| 41 | int a : 31; |
| 42 | } __attribute__ ((__packed__)) bfx_packed; |
| 43 | |
| 44 | struct BitFields2 { |
| 45 | int : 31; |
| 46 | int a : 1; |
| 47 | } bfx2; |
| 48 | |
| 49 | struct BitFields2_packed { |
| 50 | int : 31; |
| 51 | int a : 1; |
| 52 | } __attribute__ ((__packed__)) bfx2_packed; |
| 53 | |
| 54 | struct BitFields3 { |
| 55 | int : 11; |
| 56 | int a : 14; |
| 57 | } bfx3; |
| 58 | |
| 59 | struct BitFields3_packed { |
| 60 | int : 11; |
| 61 | int a : 14; |
| 62 | } __attribute__ ((__packed__)) bfx3_packed; |
| 63 | |
| 64 | struct BitFields4 { |
| 65 | short : 16; |
| 66 | int a: 1; |
| 67 | long b : 7; |
| 68 | } bfx4; |
| 69 | |
| 70 | struct BitFields4_packed { |
| 71 | short : 16; |
| 72 | int a: 1; |
| 73 | long b : 7; |
| 74 | } __attribute__ ((__packed__)) bfx4_packed; |
| 75 | |
| 76 | typedef float float2 __attribute__((ext_vector_type(2))); |
| 77 | float2 float2x; |
| 78 | |
Akira Hatanaka | 8c26ea6 | 2015-11-18 00:15:28 +0000 | [diff] [blame] | 79 | // Register "0" is currently an invalid register for global register variables. |
| 80 | // Use "esp" instead of "0". |
| 81 | // register int rix __asm__("0"); |
| 82 | register int rix __asm__("esp"); |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 83 | |
| 84 | int main() { |
Alexey Bataev | 9d541a7 | 2015-05-08 11:47:16 +0000 | [diff] [blame] | 85 | // CHECK-NOT: atomicrmw |
| 86 | #pragma omp atomic |
| 87 | ++dv; |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 88 | // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic |
| 89 | #pragma omp atomic |
| 90 | bx++; |
| 91 | // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic |
| 92 | #pragma omp atomic update |
| 93 | ++cx; |
| 94 | // CHECK: atomicrmw sub i8* @{{.+}}, i8 1 monotonic |
| 95 | #pragma omp atomic |
| 96 | ucx--; |
| 97 | // CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic |
| 98 | #pragma omp atomic update |
| 99 | --sx; |
| 100 | // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, |
| 101 | // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32 |
| 102 | // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic |
| 103 | // CHECK: br label %[[CONT:.+]] |
| 104 | // CHECK: [[CONT]] |
| 105 | // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 106 | // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32 |
| 107 | // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]] |
| 108 | // CHECK: [[DESIRED:%.+]] = trunc i32 [[ADD]] to i16 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 109 | // CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]], |
| 110 | // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 111 | // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic |
| 112 | // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 |
| 113 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 |
| 114 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 115 | // CHECK: [[EXIT]] |
| 116 | #pragma omp atomic |
| 117 | usx += usv; |
| 118 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 119 | // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic |
| 120 | // CHECK: br label %[[CONT:.+]] |
| 121 | // CHECK: [[CONT]] |
| 122 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 123 | // CHECK: [[DESIRED:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 124 | // CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], |
| 125 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 126 | // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 127 | // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 |
| 128 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 129 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 130 | // CHECK: [[EXIT]] |
| 131 | #pragma omp atomic update |
| 132 | ix *= iv; |
| 133 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 134 | // CHECK: atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic |
| 135 | #pragma omp atomic |
| 136 | uix -= uiv; |
| 137 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 138 | // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic |
| 139 | // CHECK: br label %[[CONT:.+]] |
| 140 | // CHECK: [[CONT]] |
| 141 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 142 | // CHECK: [[DESIRED:%.+]] = shl i32 [[EXPECTED]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 143 | // CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], |
| 144 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 145 | // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 146 | // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 |
| 147 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 148 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 149 | // CHECK: [[EXIT]] |
| 150 | #pragma omp atomic update |
| 151 | ix <<= iv; |
| 152 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, |
| 153 | // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic |
| 154 | // CHECK: br label %[[CONT:.+]] |
| 155 | // CHECK: [[CONT]] |
| 156 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 157 | // CHECK: [[DESIRED:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 158 | // CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], |
| 159 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 160 | // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 161 | // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 |
| 162 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 163 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 164 | // CHECK: [[EXIT]] |
| 165 | #pragma omp atomic |
| 166 | uix >>= uiv; |
| 167 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 168 | // CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic |
| 169 | // CHECK: br label %[[CONT:.+]] |
| 170 | // CHECK: [[CONT]] |
| 171 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 172 | // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 173 | // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], |
| 174 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 175 | // CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 176 | // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0 |
| 177 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 178 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 179 | // CHECK: [[EXIT]] |
| 180 | #pragma omp atomic update |
| 181 | lx /= lv; |
| 182 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 183 | // CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 184 | #pragma omp atomic |
| 185 | ulx &= ulv; |
| 186 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 187 | // CHECK: atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 188 | #pragma omp atomic update |
| 189 | llx ^= llv; |
| 190 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
| 191 | // CHECK: atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 192 | #pragma omp atomic |
| 193 | ullx |= ullv; |
| 194 | // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, |
| 195 | // CHECK: [[OLD:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 196 | // CHECK: br label %[[CONT:.+]] |
| 197 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 198 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] |
| 199 | // CHECK: [[BITCAST:%.+]] = bitcast float* [[TEMP:%.+]] to i32* |
| 200 | // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 201 | // CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 202 | // CHECK: store float [[ADD]], float* [[TEMP]], |
| 203 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[BITCAST]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 204 | // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 205 | // CHECK: [[PREV:%.+]] = extractvalue { i32, i1 } [[RES]], 0 |
| 206 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 207 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 208 | // CHECK: [[EXIT]] |
| 209 | #pragma omp atomic update |
| 210 | fx = fx + fv; |
| 211 | // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, |
| 212 | // CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 213 | // CHECK: br label %[[CONT:.+]] |
| 214 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 215 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] |
| 216 | // CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64* |
| 217 | // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 218 | // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 219 | // CHECK: store double [[SUB]], double* [[TEMP]], |
| 220 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 221 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 222 | // CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 223 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 224 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 225 | // CHECK: [[EXIT]] |
| 226 | #pragma omp atomic |
| 227 | dx = dv - dx; |
| 228 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, |
| 229 | // CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 230 | // CHECK: br label %[[CONT:.+]] |
| 231 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 232 | // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] |
| 233 | // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* |
| 234 | // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]], |
| 235 | // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* |
| 236 | // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]], |
| 237 | // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 238 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 239 | // CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 240 | // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]] |
| 241 | // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic |
| 242 | // CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0 |
| 243 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 244 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 245 | // CHECK: [[EXIT]] |
| 246 | #pragma omp atomic update |
| 247 | ldx = ldx * ldv; |
| 248 | // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) |
| 249 | // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 250 | // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 251 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 252 | // CHECK: br label %[[CONT:.+]] |
| 253 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 254 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 255 | // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 256 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 257 | // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] |
| 258 | // <Skip checks for complex calculations> |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 259 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 260 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 261 | // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] |
| 262 | // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] |
| 263 | // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* |
| 264 | // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* |
| 265 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 266 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 267 | // CHECK: [[EXIT]] |
| 268 | #pragma omp atomic |
| 269 | cix = civ / cix; |
| 270 | // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) |
| 271 | // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 272 | // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 273 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 274 | // CHECK: br label %[[CONT:.+]] |
| 275 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 276 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 277 | // CHECK: [[X_RE:%.+]] = load float, float* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 278 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 279 | // CHECK: [[X_IM:%.+]] = load float, float* [[X_IM_ADDR]] |
| 280 | // <Skip checks for complex calculations> |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 281 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 282 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 283 | // CHECK: store float %{{.+}}, float* [[X_RE_ADDR]] |
| 284 | // CHECK: store float %{{.+}}, float* [[X_IM_ADDR]] |
| 285 | // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* |
| 286 | // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* |
| 287 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 288 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 289 | // CHECK: [[EXIT]] |
| 290 | #pragma omp atomic update |
| 291 | cfx = cfv + cfx; |
| 292 | // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) |
| 293 | // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 294 | // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 295 | // CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 296 | // CHECK: br label %[[CONT:.+]] |
| 297 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 298 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 299 | // CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 300 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 301 | // CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]] |
| 302 | // <Skip checks for complex calculations> |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 303 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 304 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 305 | // CHECK: store double %{{.+}}, double* [[X_RE_ADDR]] |
| 306 | // CHECK: store double %{{.+}}, double* [[X_IM_ADDR]] |
| 307 | // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* |
| 308 | // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* |
| 309 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 310 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 311 | // CHECK: [[EXIT]] |
| 312 | // CHECK: call{{.*}} @__kmpc_flush( |
| 313 | #pragma omp atomic seq_cst |
| 314 | cdx = cdx - cdv; |
| 315 | // CHECK: [[BV:%.+]] = load i8, i8* @{{.+}} |
| 316 | // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1 |
| 317 | // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64 |
| 318 | // CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic |
| 319 | #pragma omp atomic update |
| 320 | ulx = ulx & bv; |
| 321 | // CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1 |
| 322 | // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32 |
| 323 | // CHECK: [[BX:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 324 | // CHECK: br label %[[CONT:.+]] |
| 325 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 326 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[BX]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 327 | // CHECK: [[OLD:%.+]] = trunc i8 [[EXPECTED]] to i1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 328 | // CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD]] to i32 |
| 329 | // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]] |
| 330 | // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 331 | // CHECK: [[DESIRED:%.+]] = zext i1 [[CAST]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 332 | // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], |
| 333 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 334 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 335 | // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 336 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 337 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 338 | // CHECK: [[EXIT]] |
| 339 | #pragma omp atomic |
| 340 | bx = cv & bx; |
| 341 | // CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}}, |
| 342 | // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32 |
| 343 | // CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst |
| 344 | // CHECK: br label %[[CONT:.+]] |
| 345 | // CHECK: [[CONT]] |
| 346 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 347 | // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32 |
| 348 | // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]] |
| 349 | // CHECK: [[DESIRED:%.+]] = trunc i32 [[ASHR]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 350 | // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], |
| 351 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 352 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst |
| 353 | // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
| 354 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 355 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 356 | // CHECK: [[EXIT]] |
| 357 | // CHECK: call{{.*}} @__kmpc_flush( |
| 358 | #pragma omp atomic update, seq_cst |
| 359 | cx = cx >> ucv; |
| 360 | // CHECK: [[SV:%.+]] = load i16, i16* @{{.+}}, |
| 361 | // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32 |
| 362 | // CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic |
| 363 | // CHECK: br label %[[CONT:.+]] |
| 364 | // CHECK: [[CONT]] |
| 365 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 366 | // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32 |
| 367 | // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]] |
| 368 | // CHECK: [[DESIRED:%.+]] = sext i32 [[SHL]] to i64 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 369 | // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], |
| 370 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 371 | // CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 372 | // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 373 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 374 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 375 | // CHECK: [[EXIT]] |
| 376 | #pragma omp atomic update |
| 377 | ulx = sv << ulx; |
| 378 | // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, |
| 379 | // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64 |
| 380 | // CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic |
| 381 | // CHECK: br label %[[CONT:.+]] |
| 382 | // CHECK: [[CONT]] |
| 383 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 384 | // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 385 | // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], |
| 386 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 387 | // CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 388 | // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 389 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 390 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 391 | // CHECK: [[EXIT]] |
| 392 | #pragma omp atomic |
| 393 | lx = lx % usv; |
| 394 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} |
| 395 | // CHECK: atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst |
| 396 | // CHECK: call{{.*}} @__kmpc_flush( |
| 397 | #pragma omp atomic seq_cst, update |
| 398 | uix = iv | uix; |
| 399 | // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} |
| 400 | // CHECK: atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic |
| 401 | #pragma omp atomic |
| 402 | ix = ix & uiv; |
| 403 | // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 404 | // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 405 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 406 | // CHECK: br label %[[CONT:.+]] |
| 407 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 408 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 409 | // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 410 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 411 | // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] |
| 412 | // <Skip checks for complex calculations> |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 413 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 414 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 415 | // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] |
| 416 | // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] |
| 417 | // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* |
| 418 | // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* |
| 419 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 420 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 421 | // CHECK: [[EXIT]] |
| 422 | #pragma omp atomic update |
| 423 | cix = lv + cix; |
| 424 | // CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}}, |
| 425 | // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float |
| 426 | // CHECK: [[OLD:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 427 | // CHECK: br label %[[CONT:.+]] |
| 428 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 429 | // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] |
| 430 | // CHECK: [[BITCAST:%.+]] = bitcast float* [[TEMP:%.+]] to i32* |
| 431 | // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 432 | // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 433 | // CHECK: store float [[MUL]], float* [[TEMP]], |
| 434 | // CHECK: [[DESIRED:%.+]] = load i32, i32* [[BITCAST]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 435 | // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic |
| 436 | // CHECK: [[PREV:%.+]] = extractvalue { i32, i1 } [[RES]], 0 |
| 437 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 438 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 439 | // CHECK: [[EXIT]] |
| 440 | #pragma omp atomic |
| 441 | fx = fx * ulv; |
| 442 | // CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}}, |
| 443 | // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double |
| 444 | // CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 445 | // CHECK: br label %[[CONT:.+]] |
| 446 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 447 | // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] |
| 448 | // CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64* |
| 449 | // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 450 | // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 451 | // CHECK: store double [[DIV]], double* [[TEMP]], |
| 452 | // CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 453 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic |
| 454 | // CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 455 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 456 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 457 | // CHECK: [[EXIT]] |
| 458 | #pragma omp atomic update |
| 459 | dx /= llv; |
| 460 | // CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}}, |
| 461 | // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80 |
| 462 | // CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 463 | // CHECK: br label %[[CONT:.+]] |
| 464 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 465 | // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] |
| 466 | // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* |
| 467 | // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* |
| 468 | // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]] |
| 469 | // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 470 | // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 471 | // CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]] |
| 472 | // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 473 | // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic |
| 474 | // CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0 |
| 475 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 476 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 477 | // CHECK: [[EXIT]] |
| 478 | #pragma omp atomic |
| 479 | ldx -= ullv; |
| 480 | // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 481 | // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 482 | // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 483 | // CHECK: br label %[[CONT:.+]] |
| 484 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 485 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 486 | // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 487 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 488 | // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] |
| 489 | // <Skip checks for complex calculations> |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 490 | // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 |
| 491 | // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 |
| 492 | // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] |
| 493 | // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] |
| 494 | // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* |
| 495 | // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* |
| 496 | // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 497 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 498 | // CHECK: [[EXIT]] |
| 499 | #pragma omp atomic update |
| 500 | cix = fv / cix; |
| 501 | // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, |
| 502 | // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic |
| 503 | // CHECK: br label %[[CONT:.+]] |
| 504 | // CHECK: [[CONT]] |
| 505 | // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] |
| 506 | // CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32 |
| 507 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double |
| 508 | // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]] |
| 509 | // CHECK: [[DESIRED:%.+]] = fptosi double [[ADD]] to i16 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 510 | // CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]] |
| 511 | // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 512 | // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic |
| 513 | // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 |
| 514 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 |
| 515 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 516 | // CHECK: [[EXIT]] |
| 517 | #pragma omp atomic |
| 518 | sx = sx + dv; |
| 519 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, |
| 520 | // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 521 | // CHECK: br label %[[CONT:.+]] |
| 522 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 523 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ] |
| 524 | // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 525 | // CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 |
| 526 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80 |
| 527 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]] |
| 528 | // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 529 | // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 530 | // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]] |
| 531 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 532 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic |
| 533 | // CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
| 534 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 535 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 536 | // CHECK: [[EXIT]] |
| 537 | #pragma omp atomic update |
| 538 | bx = ldv * bx; |
| 539 | // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0), |
| 540 | // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1), |
| 541 | // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 542 | // CHECK: br label %[[CONT:.+]] |
| 543 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 544 | // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ] |
| 545 | // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 546 | // CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32 |
| 547 | // CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]] |
| 548 | // CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0 |
| 549 | // CHECK: icmp ne i32 [[SUB_RE]], 0 |
| 550 | // CHECK: icmp ne i32 [[SUB_IM]], 0 |
| 551 | // CHECK: [[BOOL_DESIRED:%.+]] = or i1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 552 | // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 553 | // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]] |
| 554 | // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 555 | // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic |
| 556 | // CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0 |
| 557 | // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 558 | // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] |
| 559 | // CHECK: [[EXIT]] |
| 560 | #pragma omp atomic |
| 561 | bx = civ - bx; |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 562 | // CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}} |
| 563 | // CHECK: load i8, i8* |
| 564 | // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32 |
| 565 | // CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 566 | // CHECK: br label %[[CONT:.+]] |
| 567 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 568 | // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_I128_OLD_VAL:%.+]], %[[CONT]] ] |
| 569 | // CHECK: [[BITCAST:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128* |
| 570 | // CHECK: store i128 [[OLD_I128]], i128* [[BITCAST]], |
| 571 | // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32> |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 572 | // CHECK: store <4 x i32> [[OLD_VEC_VAL]], <4 x i32>* [[LDTEMP:%.+]], |
| 573 | // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]] |
| 574 | // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]] |
| 575 | // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 576 | // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 577 | // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 578 | // CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]] |
| 579 | // CHECK: [[NEW_I128:%.+]] = load i128, i128* [[BITCAST]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 580 | // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic |
| 581 | // CHECK: [[FAILED_I128_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0 |
| 582 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 583 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 584 | // CHECK: [[EXIT]] |
| 585 | #pragma omp atomic update |
| 586 | int4x[sv] |= bv; |
| 587 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 588 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic |
| 589 | // CHECK: br label %[[CONT:.+]] |
| 590 | // CHECK: [[CONT]] |
| 591 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 592 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 593 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], |
| 594 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 595 | // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 |
| 596 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 |
| 597 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 598 | // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] |
| 599 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 600 | // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 601 | // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 |
| 602 | // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 |
| 603 | // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 604 | // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] |
| 605 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 606 | // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic |
| 607 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 |
| 608 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 609 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 610 | // CHECK: [[EXIT]] |
| 611 | #pragma omp atomic |
| 612 | bfx.a = bfx.a - ldv; |
| 613 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 614 | // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* |
| 615 | // CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 616 | // CHECK: br label %[[CONT:.+]] |
| 617 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 618 | // CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]] |
| 619 | // CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP1:%.+]], |
| 620 | // CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]] |
| 621 | // CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP:%.+]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 622 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 623 | // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 |
| 624 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 |
| 625 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 626 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] |
| 627 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 628 | // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 629 | // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 |
| 630 | // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 |
| 631 | // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 632 | // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] |
| 633 | // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* |
| 634 | // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 635 | // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 636 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 637 | // CHECK: [[EXIT]] |
| 638 | #pragma omp atomic update |
| 639 | bfx_packed.a *= ldv; |
| 640 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 641 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic |
| 642 | // CHECK: br label %[[CONT:.+]] |
| 643 | // CHECK: [[CONT]] |
| 644 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 645 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 646 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], |
| 647 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 648 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31 |
| 649 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 650 | // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] |
| 651 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 652 | // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 653 | // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1 |
| 654 | // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31 |
| 655 | // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647 |
| 656 | // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 657 | // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] |
| 658 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 659 | // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic |
| 660 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 |
| 661 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 662 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 663 | // CHECK: [[EXIT]] |
| 664 | #pragma omp atomic |
| 665 | bfx2.a -= ldv; |
| 666 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 667 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic |
| 668 | // CHECK: br label %[[CONT:.+]] |
| 669 | // CHECK: [[CONT]] |
| 670 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 671 | // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* |
| 672 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 673 | // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* |
| 674 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], |
| 675 | // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], |
| 676 | // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7 |
| 677 | // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32 |
| 678 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 |
| 679 | // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]] |
| 680 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 |
| 681 | // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 682 | // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 683 | // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1 |
| 684 | // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7 |
| 685 | // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127 |
| 686 | // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 687 | // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] |
| 688 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 689 | // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic |
| 690 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 |
| 691 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 692 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 693 | // CHECK: [[EXIT]] |
| 694 | #pragma omp atomic update |
| 695 | bfx2_packed.a = ldv / bfx2_packed.a; |
| 696 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 697 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic |
| 698 | // CHECK: br label %[[CONT:.+]] |
| 699 | // CHECK: [[CONT]] |
| 700 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 701 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 702 | // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], |
| 703 | // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], |
| 704 | // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7 |
| 705 | // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18 |
| 706 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 |
| 707 | // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]] |
| 708 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 709 | // CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 710 | // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383 |
| 711 | // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11 |
| 712 | // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385 |
| 713 | // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 714 | // CHECK: store i32 %{{.+}}, i32* [[TEMP1]] |
| 715 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 716 | // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic |
| 717 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 |
| 718 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 |
| 719 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 720 | // CHECK: [[EXIT]] |
| 721 | #pragma omp atomic |
| 722 | bfx3.a /= ldv; |
| 723 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 724 | // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* |
| 725 | // CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8* |
| 726 | // CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 727 | // CHECK: br label %[[CONT:.+]] |
| 728 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 729 | // CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]] |
| 730 | // CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP1:%.+]], |
| 731 | // CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]] |
| 732 | // CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP:%.+]], |
| 733 | // CHECK: [[A_LD:%.+]] = load i24, i24* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 734 | // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7 |
| 735 | // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10 |
| 736 | // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32 |
| 737 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 |
| 738 | // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]] |
| 739 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32 |
| 740 | // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 741 | // CHECK: [[BF_LD:%.+]] = load i24, i24* [[TEMP1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 742 | // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383 |
| 743 | // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3 |
| 744 | // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065 |
| 745 | // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 746 | // CHECK: store i24 %{{.+}}, i24* [[TEMP1]] |
| 747 | // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* |
| 748 | // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP1]] to i8* |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 749 | // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0) |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 750 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 751 | // CHECK: [[EXIT]] |
| 752 | #pragma omp atomic update |
| 753 | bfx3_packed.a += ldv; |
| 754 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 755 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic |
| 756 | // CHECK: br label %[[CONT:.+]] |
| 757 | // CHECK: [[CONT]] |
| 758 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 759 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 760 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], |
| 761 | // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], |
| 762 | // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47 |
| 763 | // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63 |
| 764 | // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32 |
| 765 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80 |
| 766 | // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] |
| 767 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32 |
| 768 | // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 769 | // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 770 | // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1 |
| 771 | // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16 |
| 772 | // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537 |
| 773 | // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 774 | // CHECK: store i64 %{{.+}}, i64* [[TEMP1]] |
| 775 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 776 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic |
| 777 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 |
| 778 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 779 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 780 | // CHECK: [[EXIT]] |
| 781 | #pragma omp atomic |
| 782 | bfx4.a = bfx4.a * ldv; |
| 783 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 784 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic |
| 785 | // CHECK: br label %[[CONT:.+]] |
| 786 | // CHECK: [[CONT]] |
| 787 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 788 | // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* |
| 789 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 790 | // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* |
| 791 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], |
| 792 | // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], |
| 793 | // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7 |
| 794 | // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7 |
| 795 | // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32 |
| 796 | // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80 |
| 797 | // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]] |
| 798 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32 |
| 799 | // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 800 | // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 801 | // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1 |
| 802 | // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2 |
| 803 | // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 804 | // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] |
| 805 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 806 | // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic |
| 807 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 |
| 808 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 809 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 810 | // CHECK: [[EXIT]] |
| 811 | #pragma omp atomic update |
| 812 | bfx4_packed.a -= ldv; |
| 813 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 814 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic |
| 815 | // CHECK: br label %[[CONT:.+]] |
| 816 | // CHECK: [[CONT]] |
| 817 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 818 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 819 | // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], |
| 820 | // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], |
| 821 | // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40 |
| 822 | // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57 |
| 823 | // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80 |
| 824 | // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]] |
| 825 | // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 826 | // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 827 | // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127 |
| 828 | // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17 |
| 829 | // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145 |
| 830 | // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 831 | // CHECK: store i64 [[VAL]], i64* [[TEMP1]] |
| 832 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 833 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic |
| 834 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 |
| 835 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
| 836 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 837 | // CHECK: [[EXIT]] |
| 838 | #pragma omp atomic |
| 839 | bfx4.b /= ldv; |
| 840 | // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} |
| 841 | // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic |
| 842 | // CHECK: br label %[[CONT:.+]] |
| 843 | // CHECK: [[CONT]] |
| 844 | // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 845 | // CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8* |
| 846 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 847 | // CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8* |
| 848 | // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], |
| 849 | // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], |
| 850 | // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1 |
| 851 | // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64 |
| 852 | // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80 |
| 853 | // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]] |
| 854 | // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64 |
| 855 | // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 856 | // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 857 | // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127 |
| 858 | // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1 |
| 859 | // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1 |
| 860 | // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 861 | // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] |
| 862 | // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 863 | // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic |
| 864 | // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 |
| 865 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 |
| 866 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 867 | // CHECK: [[EXIT]] |
| 868 | #pragma omp atomic update |
| 869 | bfx4_packed.b += ldv; |
| 870 | // CHECK: load i64, i64* |
| 871 | // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float |
| 872 | // CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 873 | // CHECK: br label %[[CONT:.+]] |
| 874 | // CHECK: [[CONT]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 875 | // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ] |
| 876 | // CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[TEMP:%.+]] to i64* |
| 877 | // CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]], |
| 878 | // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float> |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 879 | // CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]], |
| 880 | // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] |
| 881 | // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0 |
| 882 | // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]] |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 883 | // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[TEMP]], |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 884 | // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0 |
Alexey Bataev | f0ab553 | 2015-05-15 08:36:34 +0000 | [diff] [blame] | 885 | // CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[TEMP]] |
| 886 | // CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]] |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 887 | // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic |
| 888 | // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0 |
| 889 | // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 |
Alexey Bataev | b4505a7 | 2015-03-30 05:20:59 +0000 | [diff] [blame] | 890 | // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] |
| 891 | // CHECK: [[EXIT]] |
| 892 | #pragma omp atomic |
| 893 | float2x.x = ulv - float2x.x; |
| 894 | // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, |
| 895 | // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]]) |
| 896 | // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double |
| 897 | // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]] |
| 898 | // CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32 |
| 899 | // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]]) |
| 900 | // CHECK: call{{.*}} @__kmpc_flush( |
| 901 | #pragma omp atomic seq_cst |
| 902 | rix = dv / rix; |
| 903 | return 0; |
| 904 | } |
| 905 | |
| 906 | #endif |