| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 1 | //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file describes Mips MSA ASE instructions. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 14 | def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; |
| 15 | def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; |
| 16 | |
| 17 | def uimm3 : Operand<i32> { |
| 18 | let PrintMethod = "printUnsignedImm"; |
| 19 | } |
| 20 | |
| 21 | def uimm4 : Operand<i32> { |
| 22 | let PrintMethod = "printUnsignedImm"; |
| 23 | } |
| 24 | |
| 25 | def uimm6 : Operand<i32> { |
| 26 | let PrintMethod = "printUnsignedImm"; |
| 27 | } |
| 28 | |
| 29 | def uimm8 : Operand<i32> { |
| 30 | let PrintMethod = "printUnsignedImm"; |
| 31 | } |
| 32 | |
| 33 | def simm5 : Operand<i32>; |
| 34 | |
| 35 | def simm10 : Operand<i32>; |
| 36 | |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 37 | // Instruction encoding. |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 38 | class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; |
| 39 | class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; |
| 40 | class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; |
| 41 | class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; |
| 42 | |
| 43 | class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; |
| 44 | class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; |
| 45 | class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; |
| 46 | class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; |
| 47 | |
| 48 | class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; |
| 49 | class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; |
| 50 | class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; |
| 51 | class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; |
| 52 | |
| 53 | class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; |
| 54 | class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; |
| 55 | class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; |
| 56 | class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; |
| 57 | |
| 58 | class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; |
| 59 | class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; |
| 60 | class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; |
| 61 | class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; |
| 62 | |
| 63 | class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; |
| 64 | class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; |
| 65 | class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; |
| 66 | class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; |
| 67 | |
| 68 | class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; |
| 69 | |
| 70 | class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; |
| 71 | class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; |
| 72 | class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; |
| 73 | class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; |
| 74 | |
| 75 | class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; |
| 76 | class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; |
| 77 | class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; |
| 78 | class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; |
| 79 | |
| 80 | class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; |
| 81 | class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; |
| 82 | class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; |
| 83 | class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; |
| 84 | |
| 85 | class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; |
| 86 | class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; |
| 87 | class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; |
| 88 | class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; |
| 89 | |
| 90 | class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; |
| 91 | class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; |
| 92 | class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; |
| 93 | class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; |
| 94 | |
| 95 | class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; |
| 96 | class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; |
| 97 | class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; |
| 98 | class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; |
| 99 | |
| 100 | class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; |
| 101 | class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; |
| 102 | class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; |
| 103 | class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; |
| 104 | |
| 105 | class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; |
| 106 | class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; |
| 107 | class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; |
| 108 | class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; |
| 109 | |
| 110 | class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; |
| 111 | class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; |
| 112 | class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; |
| 113 | class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; |
| 114 | |
| 115 | class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; |
| 116 | class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; |
| 117 | class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; |
| 118 | class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; |
| 119 | |
| 120 | class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; |
| 121 | class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; |
| 122 | class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; |
| 123 | class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; |
| 124 | |
| 125 | class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; |
| 126 | class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; |
| 127 | class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; |
| 128 | class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; |
| 129 | |
| 130 | class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; |
| 131 | |
| 132 | class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; |
| 133 | |
| 134 | class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; |
| 135 | class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; |
| 136 | class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; |
| 137 | class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; |
| 138 | |
| 139 | class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; |
| 140 | class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; |
| 141 | class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; |
| 142 | class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; |
| 143 | |
| 144 | class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; |
| 145 | |
| 146 | class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; |
| 147 | class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; |
| 148 | class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; |
| 149 | class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; |
| 150 | |
| 151 | class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; |
| 152 | class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; |
| 153 | class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; |
| 154 | class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; |
| 155 | |
| 156 | class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; |
| 157 | class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; |
| 158 | class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; |
| 159 | class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; |
| 160 | |
| 161 | class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; |
| 162 | class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; |
| 163 | class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; |
| 164 | class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; |
| 165 | |
| 166 | class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; |
| 167 | class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; |
| 168 | class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; |
| 169 | class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; |
| 170 | |
| 171 | class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; |
| 172 | class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; |
| 173 | class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; |
| 174 | class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; |
| 175 | |
| 176 | class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; |
| 177 | class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; |
| 178 | class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; |
| 179 | class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; |
| 180 | |
| 181 | class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; |
| 182 | class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; |
| 183 | class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; |
| 184 | class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; |
| 185 | |
| 186 | class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; |
| 187 | class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; |
| 188 | class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; |
| 189 | class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; |
| 190 | |
| 191 | class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; |
| 192 | class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; |
| 193 | class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; |
| 194 | class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; |
| 195 | |
| 196 | class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; |
| 197 | class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; |
| 198 | class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; |
| 199 | class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; |
| 200 | |
| 201 | class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; |
| 202 | class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; |
| 203 | class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; |
| 204 | class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; |
| 205 | |
| 206 | class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; |
| 207 | class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; |
| 208 | class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; |
| 209 | |
| 210 | class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; |
| 211 | class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; |
| 212 | class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; |
| 213 | |
| 214 | class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; |
| 215 | class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; |
| 216 | class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; |
| 217 | class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; |
| 218 | |
| 219 | class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; |
| 220 | class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; |
| 221 | class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; |
| 222 | class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; |
| 223 | |
| 224 | class DOTP_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010011>; |
| 225 | class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; |
| 226 | class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; |
| 227 | class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; |
| 228 | |
| 229 | class DOTP_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010011>; |
| 230 | class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; |
| 231 | class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; |
| 232 | class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; |
| 233 | |
| 234 | class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; |
| 235 | class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; |
| 236 | class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; |
| 237 | |
| 238 | class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; |
| 239 | class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; |
| 240 | class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; |
| 241 | |
| 242 | class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; |
| 243 | class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; |
| 244 | class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; |
| 245 | |
| 246 | class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; |
| 247 | class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; |
| 248 | class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; |
| 249 | |
| 250 | class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; |
| 251 | class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; |
| 252 | class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; |
| 253 | class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; |
| 254 | |
| 255 | class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; |
| 256 | class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; |
| 257 | class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; |
| 258 | class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; |
| 259 | |
| 260 | class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; |
| 261 | class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; |
| 262 | class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; |
| 263 | class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; |
| 264 | |
| 265 | class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; |
| 266 | class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; |
| 267 | class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; |
| 268 | class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; |
| 269 | |
| 270 | class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; |
| 271 | class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; |
| 272 | class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; |
| 273 | |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 274 | class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; |
| 275 | class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; |
| 276 | class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; |
| 277 | class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 278 | |
| 279 | class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; |
| 280 | class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; |
| 281 | class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; |
| 282 | class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; |
| 283 | |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 284 | class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; |
| 285 | class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; |
| 286 | class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; |
| 287 | class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; |
| 288 | |
| 289 | // Instruction desc. |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 290 | class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 291 | InstrItinClass itin, RegisterClass RCWD, |
| 292 | RegisterClass RCWS> { |
| 293 | dag OutOperandList = (outs RCWD:$wd); |
| 294 | dag InOperandList = (ins RCWS:$ws, uimm6:$u6); |
| 295 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); |
| 296 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; |
| 297 | InstrItinClass Itinerary = itin; |
| 298 | } |
| 299 | |
| 300 | class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 301 | InstrItinClass itin, RegisterClass RCWD, |
| 302 | RegisterClass RCWS> { |
| 303 | dag OutOperandList = (outs RCWD:$wd); |
| 304 | dag InOperandList = (ins RCWS:$ws, uimm5:$u5); |
| 305 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); |
| 306 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; |
| 307 | InstrItinClass Itinerary = itin; |
| 308 | } |
| 309 | |
| 310 | class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 311 | InstrItinClass itin, RegisterClass RCWD, |
| 312 | RegisterClass RCWS> { |
| 313 | dag OutOperandList = (outs RCWD:$wd); |
| 314 | dag InOperandList = (ins RCWS:$ws, uimm4:$u4); |
| 315 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); |
| 316 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; |
| 317 | InstrItinClass Itinerary = itin; |
| 318 | } |
| 319 | |
| 320 | class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 321 | InstrItinClass itin, RegisterClass RCWD, |
| 322 | RegisterClass RCWS> { |
| 323 | dag OutOperandList = (outs RCWD:$wd); |
| 324 | dag InOperandList = (ins RCWS:$ws, uimm3:$u3); |
| 325 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); |
| 326 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; |
| 327 | InstrItinClass Itinerary = itin; |
| 328 | } |
| 329 | |
| 330 | class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 331 | InstrItinClass itin, RegisterClass RCD, |
| 332 | RegisterClass RCWS> { |
| 333 | dag OutOperandList = (outs RCD:$rd); |
| 334 | dag InOperandList = (ins RCWS:$ws, uimm6:$n); |
| 335 | string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); |
| 336 | list<dag> Pattern = [(set RCD:$rd, (OpNode RCWS:$ws, immZExt6:$n))]; |
| 337 | InstrItinClass Itinerary = itin; |
| 338 | } |
| 339 | |
| 340 | class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 341 | InstrItinClass itin, RegisterClass RCWD, |
| 342 | RegisterClass RCWS> { |
| 343 | dag OutOperandList = (outs RCWD:$wd); |
| 344 | dag InOperandList = (ins RCWS:$ws, uimm5:$u5); |
| 345 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); |
| 346 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; |
| 347 | InstrItinClass Itinerary = itin; |
| 348 | } |
| 349 | |
| 350 | class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 351 | InstrItinClass itin, RegisterClass RCWD, |
| 352 | RegisterClass RCWS> { |
| 353 | dag OutOperandList = (outs RCWD:$wd); |
| 354 | dag InOperandList = (ins RCWS:$ws, simm5:$s5); |
| 355 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5"); |
| 356 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))]; |
| 357 | InstrItinClass Itinerary = itin; |
| 358 | } |
| 359 | |
| 360 | class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 361 | InstrItinClass itin, RegisterClass RCWD, |
| 362 | RegisterClass RCWS> { |
| 363 | dag OutOperandList = (outs RCWD:$wd); |
| 364 | dag InOperandList = (ins RCWS:$ws, uimm8:$u8); |
| 365 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); |
| 366 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; |
| 367 | InstrItinClass Itinerary = itin; |
| 368 | } |
| 369 | |
| 370 | class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 371 | InstrItinClass itin, RegisterClass RCWD> { |
| 372 | dag OutOperandList = (outs RCWD:$wd); |
| 373 | dag InOperandList = (ins simm10:$i10); |
| 374 | string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); |
| 375 | list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))]; |
| 376 | InstrItinClass Itinerary = itin; |
| 377 | } |
| 378 | |
| 379 | class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 380 | InstrItinClass itin, RegisterClass RCWD, |
| 381 | RegisterClass RCWS> { |
| 382 | dag OutOperandList = (outs RCWD:$wd); |
| 383 | dag InOperandList = (ins RCWS:$ws); |
| 384 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); |
| 385 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; |
| 386 | InstrItinClass Itinerary = itin; |
| 387 | } |
| 388 | |
| 389 | class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 390 | InstrItinClass itin, RegisterClass RCWD, |
| 391 | RegisterClass RCWS> : |
| 392 | MSA_2R_DESC_BASE<instr_asm, OpNode, itin, RCWD, RCWS>; |
| 393 | |
| 394 | |
| 395 | class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 396 | InstrItinClass itin, RegisterClass RCWD, |
| 397 | RegisterClass RCWS, RegisterClass RCWT = RCWS> { |
| 398 | dag OutOperandList = (outs RCWD:$wd); |
| 399 | dag InOperandList = (ins RCWS:$ws, RCWT:$wt); |
| 400 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); |
| 401 | list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; |
| 402 | InstrItinClass Itinerary = itin; |
| 403 | } |
| 404 | |
| 405 | class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 406 | InstrItinClass itin, RegisterClass RCWD, |
| 407 | RegisterClass RCWS, RegisterClass RCWT = RCWS> { |
| 408 | dag OutOperandList = (outs RCWD:$wd); |
| 409 | dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); |
| 410 | string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); |
| 411 | list<dag> Pattern = [(set RCWD:$wd, |
| 412 | (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; |
| 413 | InstrItinClass Itinerary = itin; |
| 414 | string Constraints = "$wd = $wd_in"; |
| 415 | } |
| 416 | |
| 417 | class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 418 | InstrItinClass itin, RegisterClass RCWD, |
| 419 | RegisterClass RCWS, RegisterClass RCWT = RCWS> : |
| 420 | MSA_3R_DESC_BASE<instr_asm, OpNode, itin, RCWD, RCWS, RCWT>; |
| 421 | |
| 422 | class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 423 | InstrItinClass itin, RegisterClass RCWD, |
| 424 | RegisterClass RCWS, RegisterClass RCWT = RCWS> : |
| 425 | MSA_3R_4R_DESC_BASE<instr_asm, OpNode, itin, RCWD, RCWS, RCWT>; |
| 426 | |
| 427 | class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 428 | InstrItinClass itin, RegisterClass RCD, |
| 429 | RegisterClass RCWS> { |
| 430 | dag OutOperandList = (outs RCD:$wd); |
| 431 | dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$rs); |
| 432 | string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); |
| 433 | list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, |
| 434 | immZExt6:$n, |
| 435 | RCWS:$rs))]; |
| 436 | InstrItinClass Itinerary = itin; |
| 437 | string Constraints = "$wd = $wd_in"; |
| 438 | } |
| 439 | |
| 440 | class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, NoItinerary, |
| 441 | MSA128, MSA128>, IsCommutable; |
| 442 | class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, NoItinerary, |
| 443 | MSA128, MSA128>, IsCommutable; |
| 444 | class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, NoItinerary, |
| 445 | MSA128, MSA128>, IsCommutable; |
| 446 | class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, NoItinerary, |
| 447 | MSA128, MSA128>, IsCommutable; |
| 448 | |
| 449 | class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, |
| 450 | NoItinerary, MSA128, MSA128>, |
| 451 | IsCommutable; |
| 452 | class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, |
| 453 | NoItinerary, MSA128, MSA128>, |
| 454 | IsCommutable; |
| 455 | class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, |
| 456 | NoItinerary, MSA128, MSA128>, |
| 457 | IsCommutable; |
| 458 | class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, |
| 459 | NoItinerary, MSA128, MSA128>, |
| 460 | IsCommutable; |
| 461 | |
| 462 | class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, |
| 463 | NoItinerary, MSA128, MSA128>, |
| 464 | IsCommutable; |
| 465 | class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, |
| 466 | NoItinerary, MSA128, MSA128>, |
| 467 | IsCommutable; |
| 468 | class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, |
| 469 | NoItinerary, MSA128, MSA128>, |
| 470 | IsCommutable; |
| 471 | class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, |
| 472 | NoItinerary, MSA128, MSA128>, |
| 473 | IsCommutable; |
| 474 | |
| 475 | class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, |
| 476 | NoItinerary, MSA128, MSA128>, |
| 477 | IsCommutable; |
| 478 | class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, |
| 479 | NoItinerary, MSA128, MSA128>, |
| 480 | IsCommutable; |
| 481 | class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, |
| 482 | NoItinerary, MSA128, MSA128>, |
| 483 | IsCommutable; |
| 484 | class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, |
| 485 | NoItinerary, MSA128, MSA128>, |
| 486 | IsCommutable; |
| 487 | |
| 488 | class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", int_mips_addv_b, NoItinerary, |
| 489 | MSA128, MSA128>, IsCommutable; |
| 490 | class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", int_mips_addv_h, NoItinerary, |
| 491 | MSA128, MSA128>, IsCommutable; |
| 492 | class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", int_mips_addv_w, NoItinerary, |
| 493 | MSA128, MSA128>, IsCommutable; |
| 494 | class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", int_mips_addv_d, NoItinerary, |
| 495 | MSA128, MSA128>, IsCommutable; |
| 496 | |
| 497 | class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, NoItinerary, |
| 498 | MSA128, MSA128>; |
| 499 | class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, NoItinerary, |
| 500 | MSA128, MSA128>; |
| 501 | class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, NoItinerary, |
| 502 | MSA128, MSA128>; |
| 503 | class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, NoItinerary, |
| 504 | MSA128, MSA128>; |
| 505 | |
| 506 | class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, NoItinerary, |
| 507 | MSA128, MSA128>; |
| 508 | |
| 509 | class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, |
| 510 | NoItinerary, MSA128, MSA128>; |
| 511 | class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, |
| 512 | NoItinerary, MSA128, MSA128>; |
| 513 | class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, |
| 514 | NoItinerary, MSA128, MSA128>; |
| 515 | class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, |
| 516 | NoItinerary, MSA128, MSA128>; |
| 517 | |
| 518 | class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, |
| 519 | NoItinerary, MSA128, MSA128>; |
| 520 | class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, |
| 521 | NoItinerary, MSA128, MSA128>; |
| 522 | class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, |
| 523 | NoItinerary, MSA128, MSA128>; |
| 524 | class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, |
| 525 | NoItinerary, MSA128, MSA128>; |
| 526 | |
| 527 | class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, NoItinerary, |
| 528 | MSA128, MSA128>, IsCommutable; |
| 529 | class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, NoItinerary, |
| 530 | MSA128, MSA128>, IsCommutable; |
| 531 | class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, NoItinerary, |
| 532 | MSA128, MSA128>, IsCommutable; |
| 533 | class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, NoItinerary, |
| 534 | MSA128, MSA128>, IsCommutable; |
| 535 | |
| 536 | class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, NoItinerary, |
| 537 | MSA128, MSA128>, IsCommutable; |
| 538 | class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, NoItinerary, |
| 539 | MSA128, MSA128>, IsCommutable; |
| 540 | class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, NoItinerary, |
| 541 | MSA128, MSA128>, IsCommutable; |
| 542 | class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, NoItinerary, |
| 543 | MSA128, MSA128>, IsCommutable; |
| 544 | |
| 545 | class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, |
| 546 | NoItinerary, MSA128, MSA128>, |
| 547 | IsCommutable; |
| 548 | class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, |
| 549 | NoItinerary, MSA128, MSA128>, |
| 550 | IsCommutable; |
| 551 | class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, |
| 552 | NoItinerary, MSA128, MSA128>, |
| 553 | IsCommutable; |
| 554 | class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, |
| 555 | NoItinerary, MSA128, MSA128>, |
| 556 | IsCommutable; |
| 557 | |
| 558 | class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, |
| 559 | NoItinerary, MSA128, MSA128>, |
| 560 | IsCommutable; |
| 561 | class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, |
| 562 | NoItinerary, MSA128, MSA128>, |
| 563 | IsCommutable; |
| 564 | class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, |
| 565 | NoItinerary, MSA128, MSA128>, |
| 566 | IsCommutable; |
| 567 | class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, |
| 568 | NoItinerary, MSA128, MSA128>, |
| 569 | IsCommutable; |
| 570 | |
| 571 | class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, NoItinerary, |
| 572 | MSA128, MSA128>; |
| 573 | class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, NoItinerary, |
| 574 | MSA128, MSA128>; |
| 575 | class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, NoItinerary, |
| 576 | MSA128, MSA128>; |
| 577 | class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, NoItinerary, |
| 578 | MSA128, MSA128>; |
| 579 | |
| 580 | class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, |
| 581 | NoItinerary, MSA128, MSA128>; |
| 582 | class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, |
| 583 | NoItinerary, MSA128, MSA128>; |
| 584 | class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, |
| 585 | NoItinerary, MSA128, MSA128>; |
| 586 | class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, |
| 587 | NoItinerary, MSA128, MSA128>; |
| 588 | |
| 589 | class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, NoItinerary, |
| 590 | MSA128, MSA128>; |
| 591 | class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, NoItinerary, |
| 592 | MSA128, MSA128>; |
| 593 | class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, NoItinerary, |
| 594 | MSA128, MSA128>; |
| 595 | class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, NoItinerary, |
| 596 | MSA128, MSA128>; |
| 597 | |
| 598 | class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, |
| 599 | NoItinerary, MSA128, MSA128>; |
| 600 | class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, |
| 601 | NoItinerary, MSA128, MSA128>; |
| 602 | class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, |
| 603 | NoItinerary, MSA128, MSA128>; |
| 604 | class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, |
| 605 | NoItinerary, MSA128, MSA128>; |
| 606 | |
| 607 | class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, NoItinerary, |
| 608 | MSA128, MSA128>; |
| 609 | class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, NoItinerary, |
| 610 | MSA128, MSA128>; |
| 611 | class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, NoItinerary, |
| 612 | MSA128, MSA128>; |
| 613 | class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, NoItinerary, |
| 614 | MSA128, MSA128>; |
| 615 | |
| 616 | class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, |
| 617 | NoItinerary, MSA128, MSA128>; |
| 618 | class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, |
| 619 | NoItinerary, MSA128, MSA128>; |
| 620 | class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, |
| 621 | NoItinerary, MSA128, MSA128>; |
| 622 | class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, |
| 623 | NoItinerary, MSA128, MSA128>; |
| 624 | |
| 625 | class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, NoItinerary, |
| 626 | MSA128, MSA128>; |
| 627 | |
| 628 | class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, NoItinerary, |
| 629 | MSA128, MSA128>; |
| 630 | |
| 631 | class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, NoItinerary, |
| 632 | MSA128, MSA128>; |
| 633 | class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, NoItinerary, |
| 634 | MSA128, MSA128>; |
| 635 | class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, NoItinerary, |
| 636 | MSA128, MSA128>; |
| 637 | class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, NoItinerary, |
| 638 | MSA128, MSA128>; |
| 639 | |
| 640 | class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, |
| 641 | NoItinerary, MSA128, MSA128>; |
| 642 | class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, |
| 643 | NoItinerary, MSA128, MSA128>; |
| 644 | class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, |
| 645 | NoItinerary, MSA128, MSA128>; |
| 646 | class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, |
| 647 | NoItinerary, MSA128, MSA128>; |
| 648 | |
| 649 | class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, NoItinerary, |
| 650 | MSA128, MSA128>; |
| 651 | |
| 652 | class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, NoItinerary, |
| 653 | MSA128, MSA128>; |
| 654 | class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, NoItinerary, |
| 655 | MSA128, MSA128>; |
| 656 | class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, NoItinerary, |
| 657 | MSA128, MSA128>; |
| 658 | class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, NoItinerary, |
| 659 | MSA128, MSA128>; |
| 660 | |
| 661 | class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, |
| 662 | NoItinerary, MSA128, MSA128>; |
| 663 | class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, |
| 664 | NoItinerary, MSA128, MSA128>; |
| 665 | class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, |
| 666 | NoItinerary, MSA128, MSA128>; |
| 667 | class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, |
| 668 | NoItinerary, MSA128, MSA128>; |
| 669 | |
| 670 | class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, NoItinerary, |
| 671 | MSA128, MSA128>, IsCommutable; |
| 672 | class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, NoItinerary, |
| 673 | MSA128, MSA128>, IsCommutable; |
| 674 | class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, NoItinerary, |
| 675 | MSA128, MSA128>, IsCommutable; |
| 676 | class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, NoItinerary, |
| 677 | MSA128, MSA128>, IsCommutable; |
| 678 | |
| 679 | class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, NoItinerary, |
| 680 | MSA128, MSA128>; |
| 681 | class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, NoItinerary, |
| 682 | MSA128, MSA128>; |
| 683 | class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, NoItinerary, |
| 684 | MSA128, MSA128>; |
| 685 | class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, NoItinerary, |
| 686 | MSA128, MSA128>; |
| 687 | |
| 688 | class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, NoItinerary, |
| 689 | MSA128, MSA128>; |
| 690 | class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, NoItinerary, |
| 691 | MSA128, MSA128>; |
| 692 | class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, NoItinerary, |
| 693 | MSA128, MSA128>; |
| 694 | class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, NoItinerary, |
| 695 | MSA128, MSA128>; |
| 696 | |
| 697 | class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, NoItinerary, |
| 698 | MSA128, MSA128>; |
| 699 | class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, NoItinerary, |
| 700 | MSA128, MSA128>; |
| 701 | class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, NoItinerary, |
| 702 | MSA128, MSA128>; |
| 703 | class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, NoItinerary, |
| 704 | MSA128, MSA128>; |
| 705 | |
| 706 | class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b, |
| 707 | NoItinerary, MSA128, MSA128>; |
| 708 | class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h, |
| 709 | NoItinerary, MSA128, MSA128>; |
| 710 | class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w, |
| 711 | NoItinerary, MSA128, MSA128>; |
| 712 | class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d, |
| 713 | NoItinerary, MSA128, MSA128>; |
| 714 | |
| 715 | class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b, |
| 716 | NoItinerary, MSA128, MSA128>; |
| 717 | class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h, |
| 718 | NoItinerary, MSA128, MSA128>; |
| 719 | class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w, |
| 720 | NoItinerary, MSA128, MSA128>; |
| 721 | class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d, |
| 722 | NoItinerary, MSA128, MSA128>; |
| 723 | |
| 724 | class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, NoItinerary, |
| 725 | MSA128, MSA128>; |
| 726 | class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, NoItinerary, |
| 727 | MSA128, MSA128>; |
| 728 | class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, NoItinerary, |
| 729 | MSA128, MSA128>; |
| 730 | class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, NoItinerary, |
| 731 | MSA128, MSA128>; |
| 732 | |
| 733 | class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, NoItinerary, |
| 734 | MSA128, MSA128>; |
| 735 | class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, NoItinerary, |
| 736 | MSA128, MSA128>; |
| 737 | class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, NoItinerary, |
| 738 | MSA128, MSA128>; |
| 739 | class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, NoItinerary, |
| 740 | MSA128, MSA128>; |
| 741 | |
| 742 | class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b, |
| 743 | NoItinerary, MSA128, MSA128>; |
| 744 | class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h, |
| 745 | NoItinerary, MSA128, MSA128>; |
| 746 | class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w, |
| 747 | NoItinerary, MSA128, MSA128>; |
| 748 | class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d, |
| 749 | NoItinerary, MSA128, MSA128>; |
| 750 | |
| 751 | class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b, |
| 752 | NoItinerary, MSA128, MSA128>; |
| 753 | class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h, |
| 754 | NoItinerary, MSA128, MSA128>; |
| 755 | class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w, |
| 756 | NoItinerary, MSA128, MSA128>; |
| 757 | class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d, |
| 758 | NoItinerary, MSA128, MSA128>; |
| 759 | |
| 760 | class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b, |
| 761 | NoItinerary, GPR32, MSA128>; |
| 762 | class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h, |
| 763 | NoItinerary, GPR32, MSA128>; |
| 764 | class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w, |
| 765 | NoItinerary, GPR32, MSA128>; |
| 766 | |
| 767 | class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b, |
| 768 | NoItinerary, GPR32, MSA128>; |
| 769 | class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h, |
| 770 | NoItinerary, GPR32, MSA128>; |
| 771 | class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w, |
| 772 | NoItinerary, GPR32, MSA128>; |
| 773 | |
| 774 | class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", int_mips_div_s_b, NoItinerary, |
| 775 | MSA128, MSA128>; |
| 776 | class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", int_mips_div_s_h, NoItinerary, |
| 777 | MSA128, MSA128>; |
| 778 | class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", int_mips_div_s_w, NoItinerary, |
| 779 | MSA128, MSA128>; |
| 780 | class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", int_mips_div_s_d, NoItinerary, |
| 781 | MSA128, MSA128>; |
| 782 | |
| 783 | class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", int_mips_div_u_b, NoItinerary, |
| 784 | MSA128, MSA128>; |
| 785 | class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", int_mips_div_u_h, NoItinerary, |
| 786 | MSA128, MSA128>; |
| 787 | class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", int_mips_div_u_w, NoItinerary, |
| 788 | MSA128, MSA128>; |
| 789 | class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", int_mips_div_u_d, NoItinerary, |
| 790 | MSA128, MSA128>; |
| 791 | |
| 792 | class DOTP_S_B_DESC : MSA_3R_DESC_BASE<"dotp_s.b", int_mips_dotp_s_b, |
| 793 | NoItinerary, MSA128, MSA128>, |
| 794 | IsCommutable; |
| 795 | class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, |
| 796 | NoItinerary, MSA128, MSA128>, |
| 797 | IsCommutable; |
| 798 | class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, |
| 799 | NoItinerary, MSA128, MSA128>, |
| 800 | IsCommutable; |
| 801 | class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, |
| 802 | NoItinerary, MSA128, MSA128>, |
| 803 | IsCommutable; |
| 804 | |
| 805 | class DOTP_U_B_DESC : MSA_3R_DESC_BASE<"dotp_u.b", int_mips_dotp_u_b, |
| 806 | NoItinerary, MSA128, MSA128>, |
| 807 | IsCommutable; |
| 808 | class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, |
| 809 | NoItinerary, MSA128, MSA128>, |
| 810 | IsCommutable; |
| 811 | class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, |
| 812 | NoItinerary, MSA128, MSA128>, |
| 813 | IsCommutable; |
| 814 | class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, |
| 815 | NoItinerary, MSA128, MSA128>, |
| 816 | IsCommutable; |
| 817 | |
| 818 | class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, |
| 819 | NoItinerary, MSA128, MSA128>, |
| 820 | IsCommutable; |
| 821 | class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, |
| 822 | NoItinerary, MSA128, MSA128>, |
| 823 | IsCommutable; |
| 824 | class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, |
| 825 | NoItinerary, MSA128, MSA128>, |
| 826 | IsCommutable; |
| 827 | |
| 828 | class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, |
| 829 | NoItinerary, MSA128, MSA128>, |
| 830 | IsCommutable; |
| 831 | class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, |
| 832 | NoItinerary, MSA128, MSA128>, |
| 833 | IsCommutable; |
| 834 | class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, |
| 835 | NoItinerary, MSA128, MSA128>, |
| 836 | IsCommutable; |
| 837 | |
| 838 | class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, |
| 839 | NoItinerary, MSA128, MSA128>; |
| 840 | class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, |
| 841 | NoItinerary, MSA128, MSA128>; |
| 842 | class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, |
| 843 | NoItinerary, MSA128, MSA128>; |
| 844 | |
| 845 | class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, |
| 846 | NoItinerary, MSA128, MSA128>; |
| 847 | class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, |
| 848 | NoItinerary, MSA128, MSA128>; |
| 849 | class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, |
| 850 | NoItinerary, MSA128, MSA128>; |
| 851 | |
| 852 | class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, NoItinerary, |
| 853 | MSA128, MSA128>; |
| 854 | class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, NoItinerary, |
| 855 | MSA128, MSA128>; |
| 856 | class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, NoItinerary, |
| 857 | MSA128, MSA128>; |
| 858 | class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, NoItinerary, |
| 859 | MSA128, MSA128>; |
| 860 | |
| 861 | class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, NoItinerary, |
| 862 | MSA128, MSA128>; |
| 863 | class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, NoItinerary, |
| 864 | MSA128, MSA128>; |
| 865 | class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, NoItinerary, |
| 866 | MSA128, MSA128>; |
| 867 | class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, NoItinerary, |
| 868 | MSA128, MSA128>; |
| 869 | |
| 870 | class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, NoItinerary, |
| 871 | MSA128, MSA128>; |
| 872 | class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, NoItinerary, |
| 873 | MSA128, MSA128>; |
| 874 | class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, NoItinerary, |
| 875 | MSA128, MSA128>; |
| 876 | class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, NoItinerary, |
| 877 | MSA128, MSA128>; |
| 878 | |
| 879 | class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, NoItinerary, |
| 880 | MSA128, MSA128>; |
| 881 | class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, NoItinerary, |
| 882 | MSA128, MSA128>; |
| 883 | class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, NoItinerary, |
| 884 | MSA128, MSA128>; |
| 885 | class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, NoItinerary, |
| 886 | MSA128, MSA128>; |
| 887 | |
| 888 | class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b, |
| 889 | NoItinerary, MSA128, GPR32>; |
| 890 | class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h, |
| 891 | NoItinerary, MSA128, GPR32>; |
| 892 | class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w, |
| 893 | NoItinerary, MSA128, GPR32>; |
| 894 | |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 895 | class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 896 | ValueType TyNode, InstrItinClass itin, RegisterClass RCWD, |
| 897 | Operand MemOpnd = mem, ComplexPattern Addr = addr> { |
| 898 | dag OutOperandList = (outs RCWD:$wd); |
| 899 | dag InOperandList = (ins MemOpnd:$addr); |
| 900 | string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); |
| 901 | list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; |
| 902 | InstrItinClass Itinerary = itin; |
| 903 | } |
| 904 | |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 905 | class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, NoItinerary, MSA128>; |
| 906 | class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, NoItinerary, MSA128>; |
| 907 | class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, NoItinerary, MSA128>; |
| 908 | class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, NoItinerary, MSA128>; |
| 909 | |
| 910 | class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", int_mips_ldi_b, |
| 911 | NoItinerary, MSA128>; |
| 912 | class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", int_mips_ldi_h, |
| 913 | NoItinerary, MSA128>; |
| 914 | class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", int_mips_ldi_w, |
| 915 | NoItinerary, MSA128>; |
| 916 | class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", int_mips_ldi_d, |
| 917 | NoItinerary, MSA128>; |
| 918 | |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 919 | class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, |
| 920 | ValueType TyNode, InstrItinClass itin, RegisterClass RCWD, |
| 921 | Operand MemOpnd = mem, ComplexPattern Addr = addr> { |
| 922 | dag OutOperandList = (outs); |
| 923 | dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); |
| 924 | string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); |
| 925 | list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; |
| 926 | InstrItinClass Itinerary = itin; |
| 927 | } |
| 928 | |
| 929 | // Load/Store |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 930 | class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, NoItinerary, MSA128>; |
| 931 | class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, NoItinerary, MSA128>; |
| 932 | class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, NoItinerary, MSA128>; |
| 933 | class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, NoItinerary, MSA128>; |
| 934 | |
| 935 | // Instruction defs. |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 936 | def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC, Requires<[HasMSA]>; |
| 937 | def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC, Requires<[HasMSA]>; |
| 938 | def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC, Requires<[HasMSA]>; |
| 939 | def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC, Requires<[HasMSA]>; |
| 940 | |
| 941 | def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC, Requires<[HasMSA]>; |
| 942 | def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC, Requires<[HasMSA]>; |
| 943 | def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC, Requires<[HasMSA]>; |
| 944 | def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC, Requires<[HasMSA]>; |
| 945 | |
| 946 | def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC, Requires<[HasMSA]>; |
| 947 | def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC, Requires<[HasMSA]>; |
| 948 | def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC, Requires<[HasMSA]>; |
| 949 | def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC, Requires<[HasMSA]>; |
| 950 | |
| 951 | def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC, Requires<[HasMSA]>; |
| 952 | def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC, Requires<[HasMSA]>; |
| 953 | def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC, Requires<[HasMSA]>; |
| 954 | def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC, Requires<[HasMSA]>; |
| 955 | |
| 956 | def ADDV_B : ADDV_B_ENC, ADDV_B_DESC, Requires<[HasMSA]>; |
| 957 | def ADDV_H : ADDV_H_ENC, ADDV_H_DESC, Requires<[HasMSA]>; |
| 958 | def ADDV_W : ADDV_W_ENC, ADDV_W_DESC, Requires<[HasMSA]>; |
| 959 | def ADDV_D : ADDV_D_ENC, ADDV_D_DESC, Requires<[HasMSA]>; |
| 960 | |
| 961 | def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC, Requires<[HasMSA]>; |
| 962 | def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC, Requires<[HasMSA]>; |
| 963 | def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC, Requires<[HasMSA]>; |
| 964 | def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC, Requires<[HasMSA]>; |
| 965 | |
| 966 | def ANDI_B : ANDI_B_ENC, ANDI_B_DESC, Requires<[HasMSA]>; |
| 967 | |
| 968 | def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC, Requires<[HasMSA]>; |
| 969 | def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC, Requires<[HasMSA]>; |
| 970 | def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC, Requires<[HasMSA]>; |
| 971 | def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC, Requires<[HasMSA]>; |
| 972 | |
| 973 | def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC, Requires<[HasMSA]>; |
| 974 | def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC, Requires<[HasMSA]>; |
| 975 | def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC, Requires<[HasMSA]>; |
| 976 | def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC, Requires<[HasMSA]>; |
| 977 | |
| 978 | def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC, Requires<[HasMSA]>; |
| 979 | def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC, Requires<[HasMSA]>; |
| 980 | def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC, Requires<[HasMSA]>; |
| 981 | def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC, Requires<[HasMSA]>; |
| 982 | |
| 983 | def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC, Requires<[HasMSA]>; |
| 984 | def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC, Requires<[HasMSA]>; |
| 985 | def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC, Requires<[HasMSA]>; |
| 986 | def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC, Requires<[HasMSA]>; |
| 987 | |
| 988 | def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC, Requires<[HasMSA]>; |
| 989 | def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC, Requires<[HasMSA]>; |
| 990 | def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC, Requires<[HasMSA]>; |
| 991 | def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC, Requires<[HasMSA]>; |
| 992 | |
| 993 | def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC, Requires<[HasMSA]>; |
| 994 | def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC, Requires<[HasMSA]>; |
| 995 | def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC, Requires<[HasMSA]>; |
| 996 | def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC, Requires<[HasMSA]>; |
| 997 | |
| 998 | def BCLR_B : BCLR_B_ENC, BCLR_B_DESC, Requires<[HasMSA]>; |
| 999 | def BCLR_H : BCLR_H_ENC, BCLR_H_DESC, Requires<[HasMSA]>; |
| 1000 | def BCLR_W : BCLR_W_ENC, BCLR_W_DESC, Requires<[HasMSA]>; |
| 1001 | def BCLR_D : BCLR_D_ENC, BCLR_D_DESC, Requires<[HasMSA]>; |
| 1002 | |
| 1003 | def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC, Requires<[HasMSA]>; |
| 1004 | def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC, Requires<[HasMSA]>; |
| 1005 | def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC, Requires<[HasMSA]>; |
| 1006 | def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC, Requires<[HasMSA]>; |
| 1007 | |
| 1008 | def BINSL_B : BINSL_B_ENC, BINSL_B_DESC, Requires<[HasMSA]>; |
| 1009 | def BINSL_H : BINSL_H_ENC, BINSL_H_DESC, Requires<[HasMSA]>; |
| 1010 | def BINSL_W : BINSL_W_ENC, BINSL_W_DESC, Requires<[HasMSA]>; |
| 1011 | def BINSL_D : BINSL_D_ENC, BINSL_D_DESC, Requires<[HasMSA]>; |
| 1012 | |
| 1013 | def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC, Requires<[HasMSA]>; |
| 1014 | def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC, Requires<[HasMSA]>; |
| 1015 | def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC, Requires<[HasMSA]>; |
| 1016 | def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC, Requires<[HasMSA]>; |
| 1017 | |
| 1018 | def BINSR_B : BINSR_B_ENC, BINSR_B_DESC, Requires<[HasMSA]>; |
| 1019 | def BINSR_H : BINSR_H_ENC, BINSR_H_DESC, Requires<[HasMSA]>; |
| 1020 | def BINSR_W : BINSR_W_ENC, BINSR_W_DESC, Requires<[HasMSA]>; |
| 1021 | def BINSR_D : BINSR_D_ENC, BINSR_D_DESC, Requires<[HasMSA]>; |
| 1022 | |
| 1023 | def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC, Requires<[HasMSA]>; |
| 1024 | def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC, Requires<[HasMSA]>; |
| 1025 | def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC, Requires<[HasMSA]>; |
| 1026 | def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC, Requires<[HasMSA]>; |
| 1027 | |
| 1028 | def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC, Requires<[HasMSA]>; |
| 1029 | |
| 1030 | def BMZI_B : BMZI_B_ENC, BMZI_B_DESC, Requires<[HasMSA]>; |
| 1031 | |
| 1032 | def BNEG_B : BNEG_B_ENC, BNEG_B_DESC, Requires<[HasMSA]>; |
| 1033 | def BNEG_H : BNEG_H_ENC, BNEG_H_DESC, Requires<[HasMSA]>; |
| 1034 | def BNEG_W : BNEG_W_ENC, BNEG_W_DESC, Requires<[HasMSA]>; |
| 1035 | def BNEG_D : BNEG_D_ENC, BNEG_D_DESC, Requires<[HasMSA]>; |
| 1036 | |
| 1037 | def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC, Requires<[HasMSA]>; |
| 1038 | def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC, Requires<[HasMSA]>; |
| 1039 | def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC, Requires<[HasMSA]>; |
| 1040 | def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC, Requires<[HasMSA]>; |
| 1041 | |
| 1042 | def BSELI_B : BSELI_B_ENC, BSELI_B_DESC, Requires<[HasMSA]>; |
| 1043 | |
| 1044 | def BSET_B : BSET_B_ENC, BSET_B_DESC, Requires<[HasMSA]>; |
| 1045 | def BSET_H : BSET_H_ENC, BSET_H_DESC, Requires<[HasMSA]>; |
| 1046 | def BSET_W : BSET_W_ENC, BSET_W_DESC, Requires<[HasMSA]>; |
| 1047 | def BSET_D : BSET_D_ENC, BSET_D_DESC, Requires<[HasMSA]>; |
| 1048 | |
| 1049 | def BSETI_B : BSETI_B_ENC, BSETI_B_DESC, Requires<[HasMSA]>; |
| 1050 | def BSETI_H : BSETI_H_ENC, BSETI_H_DESC, Requires<[HasMSA]>; |
| 1051 | def BSETI_W : BSETI_W_ENC, BSETI_W_DESC, Requires<[HasMSA]>; |
| 1052 | def BSETI_D : BSETI_D_ENC, BSETI_D_DESC, Requires<[HasMSA]>; |
| 1053 | |
| 1054 | def CEQ_B : CEQ_B_ENC, CEQ_B_DESC, Requires<[HasMSA]>; |
| 1055 | def CEQ_H : CEQ_H_ENC, CEQ_H_DESC, Requires<[HasMSA]>; |
| 1056 | def CEQ_W : CEQ_W_ENC, CEQ_W_DESC, Requires<[HasMSA]>; |
| 1057 | def CEQ_D : CEQ_D_ENC, CEQ_D_DESC, Requires<[HasMSA]>; |
| 1058 | |
| 1059 | def CEQI_B : CEQI_B_ENC, CEQI_B_DESC, Requires<[HasMSA]>; |
| 1060 | def CEQI_H : CEQI_H_ENC, CEQI_H_DESC, Requires<[HasMSA]>; |
| 1061 | def CEQI_W : CEQI_W_ENC, CEQI_W_DESC, Requires<[HasMSA]>; |
| 1062 | def CEQI_D : CEQI_D_ENC, CEQI_D_DESC, Requires<[HasMSA]>; |
| 1063 | |
| 1064 | def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC, Requires<[HasMSA]>; |
| 1065 | def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC, Requires<[HasMSA]>; |
| 1066 | def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC, Requires<[HasMSA]>; |
| 1067 | def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC, Requires<[HasMSA]>; |
| 1068 | |
| 1069 | def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC, Requires<[HasMSA]>; |
| 1070 | def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC, Requires<[HasMSA]>; |
| 1071 | def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC, Requires<[HasMSA]>; |
| 1072 | def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC, Requires<[HasMSA]>; |
| 1073 | |
| 1074 | def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC, Requires<[HasMSA]>; |
| 1075 | def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC, Requires<[HasMSA]>; |
| 1076 | def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC, Requires<[HasMSA]>; |
| 1077 | def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC, Requires<[HasMSA]>; |
| 1078 | |
| 1079 | def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC, Requires<[HasMSA]>; |
| 1080 | def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC, Requires<[HasMSA]>; |
| 1081 | def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC, Requires<[HasMSA]>; |
| 1082 | def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC, Requires<[HasMSA]>; |
| 1083 | |
| 1084 | def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC, Requires<[HasMSA]>; |
| 1085 | def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC, Requires<[HasMSA]>; |
| 1086 | def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC, Requires<[HasMSA]>; |
| 1087 | def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC, Requires<[HasMSA]>; |
| 1088 | |
| 1089 | def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC, Requires<[HasMSA]>; |
| 1090 | def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC, Requires<[HasMSA]>; |
| 1091 | def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC, Requires<[HasMSA]>; |
| 1092 | def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC, Requires<[HasMSA]>; |
| 1093 | |
| 1094 | def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC, Requires<[HasMSA]>; |
| 1095 | def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC, Requires<[HasMSA]>; |
| 1096 | def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC, Requires<[HasMSA]>; |
| 1097 | def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC, Requires<[HasMSA]>; |
| 1098 | |
| 1099 | def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC, Requires<[HasMSA]>; |
| 1100 | def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC, Requires<[HasMSA]>; |
| 1101 | def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC, Requires<[HasMSA]>; |
| 1102 | def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC, Requires<[HasMSA]>; |
| 1103 | |
| 1104 | def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC, Requires<[HasMSA]>; |
| 1105 | def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC, Requires<[HasMSA]>; |
| 1106 | def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC, Requires<[HasMSA]>; |
| 1107 | |
| 1108 | def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC, Requires<[HasMSA]>; |
| 1109 | def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC, Requires<[HasMSA]>; |
| 1110 | def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC, Requires<[HasMSA]>; |
| 1111 | |
| 1112 | def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC, Requires<[HasMSA]>; |
| 1113 | def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC, Requires<[HasMSA]>; |
| 1114 | def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC, Requires<[HasMSA]>; |
| 1115 | def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC, Requires<[HasMSA]>; |
| 1116 | |
| 1117 | def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC, Requires<[HasMSA]>; |
| 1118 | def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC, Requires<[HasMSA]>; |
| 1119 | def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC, Requires<[HasMSA]>; |
| 1120 | def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC, Requires<[HasMSA]>; |
| 1121 | |
| 1122 | def DOTP_S_B : DOTP_S_B_ENC, DOTP_S_B_DESC, Requires<[HasMSA]>; |
| 1123 | def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC, Requires<[HasMSA]>; |
| 1124 | def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC, Requires<[HasMSA]>; |
| 1125 | def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC, Requires<[HasMSA]>; |
| 1126 | |
| 1127 | def DOTP_U_B : DOTP_U_B_ENC, DOTP_U_B_DESC, Requires<[HasMSA]>; |
| 1128 | def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC, Requires<[HasMSA]>; |
| 1129 | def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC, Requires<[HasMSA]>; |
| 1130 | def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC, Requires<[HasMSA]>; |
| 1131 | |
| 1132 | def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC, Requires<[HasMSA]>; |
| 1133 | def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC, Requires<[HasMSA]>; |
| 1134 | def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC, Requires<[HasMSA]>; |
| 1135 | |
| 1136 | def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC, Requires<[HasMSA]>; |
| 1137 | def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC, Requires<[HasMSA]>; |
| 1138 | def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC, Requires<[HasMSA]>; |
| 1139 | |
| 1140 | def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC, Requires<[HasMSA]>; |
| 1141 | def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC, Requires<[HasMSA]>; |
| 1142 | def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC, Requires<[HasMSA]>; |
| 1143 | |
| 1144 | def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC, Requires<[HasMSA]>; |
| 1145 | def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC, Requires<[HasMSA]>; |
| 1146 | def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC, Requires<[HasMSA]>; |
| 1147 | |
| 1148 | def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC, Requires<[HasMSA]>; |
| 1149 | def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC, Requires<[HasMSA]>; |
| 1150 | def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC, Requires<[HasMSA]>; |
| 1151 | def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC, Requires<[HasMSA]>; |
| 1152 | |
| 1153 | def ILVL_B : ILVL_B_ENC, ILVL_B_DESC, Requires<[HasMSA]>; |
| 1154 | def ILVL_H : ILVL_H_ENC, ILVL_H_DESC, Requires<[HasMSA]>; |
| 1155 | def ILVL_W : ILVL_W_ENC, ILVL_W_DESC, Requires<[HasMSA]>; |
| 1156 | def ILVL_D : ILVL_D_ENC, ILVL_D_DESC, Requires<[HasMSA]>; |
| 1157 | |
| 1158 | def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC, Requires<[HasMSA]>; |
| 1159 | def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC, Requires<[HasMSA]>; |
| 1160 | def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC, Requires<[HasMSA]>; |
| 1161 | def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC, Requires<[HasMSA]>; |
| 1162 | |
| 1163 | def ILVR_B : ILVR_B_ENC, ILVR_B_DESC, Requires<[HasMSA]>; |
| 1164 | def ILVR_H : ILVR_H_ENC, ILVR_H_DESC, Requires<[HasMSA]>; |
| 1165 | def ILVR_W : ILVR_W_ENC, ILVR_W_DESC, Requires<[HasMSA]>; |
| 1166 | def ILVR_D : ILVR_D_ENC, ILVR_D_DESC, Requires<[HasMSA]>; |
| 1167 | |
| 1168 | def INSERT_B : INSERT_B_ENC, INSERT_B_DESC, Requires<[HasMSA]>; |
| 1169 | def INSERT_H : INSERT_H_ENC, INSERT_H_DESC, Requires<[HasMSA]>; |
| 1170 | def INSERT_W : INSERT_W_ENC, INSERT_W_DESC, Requires<[HasMSA]>; |
| 1171 | |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 1172 | def LD_B: LD_B_ENC, LD_B_DESC, Requires<[HasMSA]>; |
| 1173 | def LD_H: LD_H_ENC, LD_H_DESC, Requires<[HasMSA]>; |
| 1174 | def LD_W: LD_W_ENC, LD_W_DESC, Requires<[HasMSA]>; |
| 1175 | def LD_D: LD_D_ENC, LD_D_DESC, Requires<[HasMSA]>; |
| 1176 | |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 1177 | def LDI_B : LDI_B_ENC, LDI_B_DESC, Requires<[HasMSA]>; |
| 1178 | def LDI_H : LDI_H_ENC, LDI_H_DESC, Requires<[HasMSA]>; |
| 1179 | def LDI_W : LDI_W_ENC, LDI_W_DESC, Requires<[HasMSA]>; |
| 1180 | |
| Jack Carter | 3a2c2d4 | 2013-08-13 20:54:07 +0000 | [diff] [blame] | 1181 | def ST_B: ST_B_ENC, ST_B_DESC, Requires<[HasMSA]>; |
| 1182 | def ST_H: ST_H_ENC, ST_H_DESC, Requires<[HasMSA]>; |
| 1183 | def ST_W: ST_W_ENC, ST_W_DESC, Requires<[HasMSA]>; |
| 1184 | def ST_D: ST_D_ENC, ST_D_DESC, Requires<[HasMSA]>; |
| 1185 | |
| 1186 | // Patterns. |
| 1187 | class MSAPat<dag pattern, dag result, Predicate pred = HasMSA> : |
| 1188 | Pat<pattern, result>, Requires<[pred]>; |
| 1189 | |
| Jack Carter | babdcc8 | 2013-08-15 12:24:57 +0000 | [diff] [blame^] | 1190 | def LD_FW : MSAPat<(v4f32 (load addr:$addr)), |
| 1191 | (LD_W addr:$addr)>; |
| 1192 | def LD_FD : MSAPat<(v2f64 (load addr:$addr)), |
| 1193 | (LD_D addr:$addr)>; |
| 1194 | |
| 1195 | def ST_FW : MSAPat<(store (v4f32 MSA128:$ws), addr:$addr), |
| 1196 | (ST_W MSA128:$ws, addr:$addr)>; |
| 1197 | def ST_FD : MSAPat<(store (v2f64 MSA128:$ws), addr:$addr), |
| 1198 | (ST_D MSA128:$ws, addr:$addr)>; |