Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 1 | //===-- AArch64FixupKinds.h - AArch64 Specific Fixup Entries ----*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 10 | #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H |
| 11 | #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H |
Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 12 | |
| 13 | #include "llvm/MC/MCFixup.h" |
| 14 | |
| 15 | namespace llvm { |
| 16 | namespace AArch64 { |
| 17 | |
| 18 | enum Fixups { |
| 19 | // fixup_aarch64_pcrel_adr_imm21 - A 21-bit pc-relative immediate inserted into |
| 20 | // an ADR instruction. |
| 21 | fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind, |
| 22 | |
| 23 | // fixup_aarch64_pcrel_adrp_imm21 - A 21-bit pc-relative immediate inserted into |
| 24 | // an ADRP instruction. |
| 25 | fixup_aarch64_pcrel_adrp_imm21, |
| 26 | |
| 27 | // fixup_aarch64_imm12 - 12-bit fixup for add/sub instructions. |
| 28 | // No alignment adjustment. All value bits are encoded. |
| 29 | fixup_aarch64_add_imm12, |
| 30 | |
| 31 | // fixup_aarch64_ldst_imm12_* - unsigned 12-bit fixups for load and |
| 32 | // store instructions. |
| 33 | fixup_aarch64_ldst_imm12_scale1, |
| 34 | fixup_aarch64_ldst_imm12_scale2, |
| 35 | fixup_aarch64_ldst_imm12_scale4, |
| 36 | fixup_aarch64_ldst_imm12_scale8, |
| 37 | fixup_aarch64_ldst_imm12_scale16, |
| 38 | |
| 39 | // fixup_aarch64_ldr_pcrel_imm19 - The high 19 bits of a 21-bit pc-relative |
| 40 | // immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is used by |
| 41 | // pc-relative loads and generates relocations directly when necessary. |
| 42 | fixup_aarch64_ldr_pcrel_imm19, |
| 43 | |
| 44 | // FIXME: comment |
| 45 | fixup_aarch64_movw, |
| 46 | |
| 47 | // fixup_aarch64_pcrel_imm14 - The high 14 bits of a 21-bit pc-relative |
| 48 | // immediate. |
| 49 | fixup_aarch64_pcrel_branch14, |
| 50 | |
| 51 | // fixup_aarch64_pcrel_branch19 - The high 19 bits of a 21-bit pc-relative |
| 52 | // immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is use by |
| 53 | // b.cc and generates relocations directly when necessary. |
| 54 | fixup_aarch64_pcrel_branch19, |
| 55 | |
| 56 | // fixup_aarch64_pcrel_branch26 - The high 26 bits of a 28-bit pc-relative |
| 57 | // immediate. |
| 58 | fixup_aarch64_pcrel_branch26, |
| 59 | |
| 60 | // fixup_aarch64_pcrel_call26 - The high 26 bits of a 28-bit pc-relative |
| 61 | // immediate. Distinguished from branch26 only on ELF. |
| 62 | fixup_aarch64_pcrel_call26, |
| 63 | |
| 64 | // fixup_aarch64_tlsdesc_call - zero-space placeholder for the ELF |
| 65 | // R_AARCH64_TLSDESC_CALL relocation. |
| 66 | fixup_aarch64_tlsdesc_call, |
| 67 | |
| 68 | // Marker |
| 69 | LastTargetFixupKind, |
| 70 | NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind |
| 71 | }; |
| 72 | |
| 73 | } // end namespace AArch64 |
| 74 | } // end namespace llvm |
| 75 | |
| 76 | #endif |