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Sid Manning7da3f9a2014-10-03 13:18:11 +00001//===-- HexagonMCCodeEmitter.h - Hexagon Target Descriptions ----*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief Definition for classes that emit Hexagon machine code from MCInsts
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef HEXAGONMCCODEEMITTER_H
16#define HEXAGONMCCODEEMITTER_H
17
18#include "llvm/MC/MCCodeEmitter.h"
19#include "llvm/MC/MCExpr.h"
20#include "llvm/MC/MCInst.h"
21#include "llvm/MC/MCInstrInfo.h"
22#include "llvm/MC/MCRegisterInfo.h"
23#include "llvm/MC/MCSubtargetInfo.h"
24#include "llvm/Support/raw_ostream.h"
25
26namespace llvm {
27
28class HexagonMCCodeEmitter : public MCCodeEmitter {
Sid Manning7da3f9a2014-10-03 13:18:11 +000029 MCContext &MCT;
Colin LeMahieuaf304e52015-02-19 19:00:00 +000030 MCInstrInfo const &MCII;
Colin LeMahieub6625652015-05-01 21:14:21 +000031 std::unique_ptr<unsigned> Addend;
32 std::unique_ptr<bool> Extended;
Colin LeMahieu68d967d2015-05-29 14:44:13 +000033 std::unique_ptr<MCInst const *> CurrentBundle;
Colin LeMahieub6625652015-05-01 21:14:21 +000034
35 // helper routine for getMachineOpValue()
36 unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO,
37 const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups,
38 const MCSubtargetInfo &STI) const;
Sid Manning7da3f9a2014-10-03 13:18:11 +000039
40public:
Eric Christopher0169e422015-03-10 22:03:14 +000041 HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCContext &aMCT);
Sid Manning7da3f9a2014-10-03 13:18:11 +000042
Colin LeMahieu68d967d2015-05-29 14:44:13 +000043 // Return parse bits for instruction `MCI' inside bundle `MCB'
44 uint32_t parseBits(size_t Instruction, size_t Last, MCInst const &MCB,
45 MCInst const &MCI) const;
46
Jim Grosbach91df21f2015-05-15 19:13:16 +000047 void encodeInstruction(MCInst const &MI, raw_ostream &OS,
Sid Manning7da3f9a2014-10-03 13:18:11 +000048 SmallVectorImpl<MCFixup> &Fixups,
49 MCSubtargetInfo const &STI) const override;
50
Colin LeMahieu68d967d2015-05-29 14:44:13 +000051 void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS,
52 SmallVectorImpl<MCFixup> &Fixups,
53 const MCSubtargetInfo &STI,
54 uint32_t Parse, size_t Index) const;
55
Colin LeMahieu70553652014-10-21 16:03:10 +000056 // \brief TableGen'erated function for getting the
Sid Manning7da3f9a2014-10-03 13:18:11 +000057 // binary encoding for an instruction.
58 uint64_t getBinaryCodeForInstr(MCInst const &MI,
59 SmallVectorImpl<MCFixup> &Fixups,
60 MCSubtargetInfo const &STI) const;
61
62 /// \brief Return binary encoding of operand.
63 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
64 SmallVectorImpl<MCFixup> &Fixups,
65 MCSubtargetInfo const &STI) const;
Sid Manning7da3f9a2014-10-03 13:18:11 +000066}; // class HexagonMCCodeEmitter
67
68} // namespace llvm
69
70#endif /* HEXAGONMCCODEEMITTER_H */