Brendon Cahoon | a57cc8b | 2015-04-20 16:03:28 +0000 | [diff] [blame] | 1 | ; RUN: opt < %s -analyze -delinearize | FileCheck %s |
| 2 | |
| 3 | target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-n32" |
| 4 | |
| 5 | ; Check that division by 1 can be delinearized. |
| 6 | ; |
| 7 | ; void test1(unsigned char *dst, int stride, int bs) { |
| 8 | ; for (int r = bs; r >= 0; --r) |
| 9 | ; for (int c = 0; c < bs; ++c) |
| 10 | ; dst[r * stride + c] = dst[(r + 1) * stride + c - 1]; |
| 11 | ; } |
| 12 | |
| 13 | ; AddRec: {{(-1 + ((1 + %bs) * %stride)),+,(-1 * %stride)}<%for.cond1.preheader>,+,1}<nw><%for.body3> |
| 14 | ; CHECK: Inst: %0 = load i8, i8* %arrayidx, align 1 |
| 15 | ; CHECK: Base offset: %dst |
| 16 | ; CHECK: ArrayDecl[UnknownSize][%stride] with elements of 1 bytes. |
| 17 | ; CHECK: ArrayRef[{(1 + %bs),+,-1}<nw><%for.cond1.preheader>][{-1,+,1}<nw><%for.body3>] |
| 18 | |
| 19 | ; AddRec: {{(%stride * %bs),+,(-1 * %stride)}<%for.cond1.preheader>,+,1}<nw><%for.body3> |
| 20 | ; CHECK: Inst: store i8 %0, i8* %arrayidx7, align 1 |
| 21 | ; CHECK: Base offset: %dst |
| 22 | ; CHECK: ArrayDecl[UnknownSize][%stride] with elements of 1 bytes. |
| 23 | ; CHECK: ArrayRef[{%bs,+,-1}<nsw><%for.cond1.preheader>][{0,+,1}<nuw><nsw><%for.body3>] |
| 24 | |
| 25 | define void @test(i8* nocapture %dst, i32 %stride, i32 %bs) { |
| 26 | entry: |
| 27 | %cmp20 = icmp sgt i32 %bs, -1 |
| 28 | br i1 %cmp20, label %for.cond1.preheader.lr.ph, label %for.end9 |
| 29 | |
| 30 | for.cond1.preheader.lr.ph: |
| 31 | %cmp218 = icmp slt i32 0, %bs |
| 32 | br label %for.cond1.preheader |
| 33 | |
| 34 | for.cond1.preheader: |
| 35 | %r.021 = phi i32 [ %bs, %for.cond1.preheader.lr.ph ], [ %dec, %for.inc8 ] |
| 36 | br i1 %cmp218, label %for.body3.lr.ph, label %for.inc8 |
| 37 | |
| 38 | for.body3.lr.ph: |
| 39 | %add = add nsw i32 %r.021, 1 |
| 40 | %mul = mul nsw i32 %add, %stride |
| 41 | %add4 = add i32 %mul, -1 |
| 42 | %mul5 = mul nsw i32 %r.021, %stride |
| 43 | br label %for.body3 |
| 44 | |
| 45 | for.body3: |
| 46 | %c.019 = phi i32 [ 0, %for.body3.lr.ph ], [ %inc, %for.body3 ] |
| 47 | %sub = add i32 %add4, %c.019 |
| 48 | %arrayidx = getelementptr inbounds i8, i8* %dst, i32 %sub |
| 49 | %0 = load i8, i8* %arrayidx, align 1 |
| 50 | %add6 = add nsw i32 %c.019, %mul5 |
| 51 | %arrayidx7 = getelementptr inbounds i8, i8* %dst, i32 %add6 |
| 52 | store i8 %0, i8* %arrayidx7, align 1 |
| 53 | %inc = add nsw i32 %c.019, 1 |
| 54 | %cmp2 = icmp slt i32 %inc, %bs |
| 55 | br i1 %cmp2, label %for.body3, label %for.cond1.for.inc8_crit_edge |
| 56 | |
| 57 | for.cond1.for.inc8_crit_edge: |
| 58 | br label %for.inc8 |
| 59 | |
| 60 | for.inc8: |
| 61 | %dec = add nsw i32 %r.021, -1 |
| 62 | %cmp = icmp sgt i32 %dec, -1 |
| 63 | br i1 %cmp, label %for.cond1.preheader, label %for.cond.for.end9_crit_edge |
| 64 | |
| 65 | for.cond.for.end9_crit_edge: |
| 66 | br label %for.end9 |
| 67 | |
| 68 | for.end9: |
| 69 | ret void |
| 70 | } |