Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / bc041b82d44b51a3b7da79c38e4052e28ff8011c / . / llvm / test / CodeGen / AMDGPU / fp_to_sint.ll
blob: 301a94b4904ca52ffd1235e1f41de079e1a231d7 [file] [log] [blame]
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]1; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=EG --check-prefix=FUNC
Tom Stellard49f8bfd2015-01-06 18:00:21 +0000[diff] [blame]2; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC
Marek Olsak75170772015-01-27 17:27:15 +0000[diff] [blame]3; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]4
Matt Arsenault268757b2015-01-15 23:17:03 +0000[diff] [blame]5declare float @llvm.fabs.f32(float) #0
6
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]7; FUNC-LABEL: {{^}}fp_to_sint_i32:
Matt Arsenault42d15652014-09-25 23:16:18 +0000[diff] [blame]8; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]9; SI: v_cvt_i32_f32_e32
10; SI: s_endpgm
Matt Arsenault268757b2015-01-15 23:17:03 +0000[diff] [blame]11define void @fp_to_sint_i32(i32 addrspace(1)* %out, float %in) {
Matt Arsenault42d15652014-09-25 23:16:18 +0000[diff] [blame]12 %conv = fptosi float %in to i32
13 store i32 %conv, i32 addrspace(1)* %out
14 ret void
15}
16
Matt Arsenault268757b2015-01-15 23:17:03 +0000[diff] [blame]17; FUNC-LABEL: {{^}}fp_to_sint_i32_fabs:
18; SI: v_cvt_i32_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|{{$}}
19define void @fp_to_sint_i32_fabs(i32 addrspace(1)* %out, float %in) {
20 %in.fabs = call float @llvm.fabs.f32(float %in) #0
21 %conv = fptosi float %in.fabs to i32
22 store i32 %conv, i32 addrspace(1)* %out
23 ret void
24}
25
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]26; FUNC-LABEL: {{^}}fp_to_sint_v2i32:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]27; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
28; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]29; SI: v_cvt_i32_f32_e32
30; SI: v_cvt_i32_f32_e32
Tom Stellard0344cdf2013-08-01 15:23:42 +0000[diff] [blame]31define void @fp_to_sint_v2i32(<2 x i32> addrspace(1)* %out, <2 x float> %in) {
32 %result = fptosi <2 x float> %in to <2 x i32>
33 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
34 ret void
35}
36
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]37; FUNC-LABEL: {{^}}fp_to_sint_v4i32:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]38; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
39; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW]}}
40; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
41; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]42; SI: v_cvt_i32_f32_e32
43; SI: v_cvt_i32_f32_e32
44; SI: v_cvt_i32_f32_e32
45; SI: v_cvt_i32_f32_e32
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]46define void @fp_to_sint_v4i32(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]47 %value = load <4 x float>, <4 x float> addrspace(1) * %in
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]48 %result = fptosi <4 x float> %value to <4 x i32>
49 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
50 ret void
51}
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]52
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]53; FUNC-LABEL: {{^}}fp_to_sint_i64:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]54
55; EG-DAG: AND_INT
56; EG-DAG: LSHR
57; EG-DAG: SUB_INT
58; EG-DAG: AND_INT
59; EG-DAG: ASHR
60; EG-DAG: AND_INT
61; EG-DAG: OR_INT
62; EG-DAG: SUB_INT
63; EG-DAG: LSHL
64; EG-DAG: LSHL
65; EG-DAG: SUB_INT
66; EG-DAG: LSHR
67; EG-DAG: LSHR
68; EG-DAG: SETGT_UINT
69; EG-DAG: SETGT_INT
70; EG-DAG: XOR_INT
71; EG-DAG: XOR_INT
72; EG: SUB_INT
73; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]74; EG-DAG: CNDE_INT
75; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]76
77; Check that the compiler doesn't crash with a "cannot select" error
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]78; SI: s_endpgm
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]79define void @fp_to_sint_i64 (i64 addrspace(1)* %out, float %in) {
80entry:
81 %0 = fptosi float %in to i64
82 store i64 %0, i64 addrspace(1)* %out
83 ret void
84}
85
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]86; FUNC: {{^}}fp_to_sint_v2i64:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]87; EG-DAG: AND_INT
88; EG-DAG: LSHR
89; EG-DAG: SUB_INT
90; EG-DAG: AND_INT
91; EG-DAG: ASHR
92; EG-DAG: AND_INT
93; EG-DAG: OR_INT
94; EG-DAG: SUB_INT
95; EG-DAG: LSHL
96; EG-DAG: LSHL
97; EG-DAG: SUB_INT
98; EG-DAG: LSHR
99; EG-DAG: LSHR
100; EG-DAG: SETGT_UINT
101; EG-DAG: SETGT_INT
102; EG-DAG: XOR_INT
103; EG-DAG: XOR_INT
104; EG-DAG: SUB_INT
105; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]106; EG-DAG: CNDE_INT
107; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]108; EG-DAG: AND_INT
109; EG-DAG: LSHR
110; EG-DAG: SUB_INT
111; EG-DAG: AND_INT
112; EG-DAG: ASHR
113; EG-DAG: AND_INT
114; EG-DAG: OR_INT
115; EG-DAG: SUB_INT
116; EG-DAG: LSHL
117; EG-DAG: LSHL
118; EG-DAG: SUB_INT
119; EG-DAG: LSHR
120; EG-DAG: LSHR
121; EG-DAG: SETGT_UINT
122; EG-DAG: SETGT_INT
123; EG-DAG: XOR_INT
124; EG-DAG: XOR_INT
125; EG-DAG: SUB_INT
126; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]127; EG-DAG: CNDE_INT
128; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]129
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]130; SI: s_endpgm
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]131define void @fp_to_sint_v2i64(<2 x i64> addrspace(1)* %out, <2 x float> %x) {
132 %conv = fptosi <2 x float> %x to <2 x i64>
133 store <2 x i64> %conv, <2 x i64> addrspace(1)* %out
134 ret void
135}
136
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]137; FUNC: {{^}}fp_to_sint_v4i64:
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]138; EG-DAG: AND_INT
139; EG-DAG: LSHR
140; EG-DAG: SUB_INT
141; EG-DAG: AND_INT
142; EG-DAG: ASHR
143; EG-DAG: AND_INT
144; EG-DAG: OR_INT
145; EG-DAG: SUB_INT
146; EG-DAG: LSHL
147; EG-DAG: LSHL
148; EG-DAG: SUB_INT
149; EG-DAG: LSHR
150; EG-DAG: LSHR
151; EG-DAG: SETGT_UINT
152; EG-DAG: SETGT_INT
153; EG-DAG: XOR_INT
154; EG-DAG: XOR_INT
155; EG-DAG: SUB_INT
156; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]157; EG-DAG: CNDE_INT
158; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]159; EG-DAG: AND_INT
160; EG-DAG: LSHR
161; EG-DAG: SUB_INT
162; EG-DAG: AND_INT
163; EG-DAG: ASHR
164; EG-DAG: AND_INT
165; EG-DAG: OR_INT
166; EG-DAG: SUB_INT
167; EG-DAG: LSHL
168; EG-DAG: LSHL
169; EG-DAG: SUB_INT
170; EG-DAG: LSHR
171; EG-DAG: LSHR
172; EG-DAG: SETGT_UINT
173; EG-DAG: SETGT_INT
174; EG-DAG: XOR_INT
175; EG-DAG: XOR_INT
176; EG-DAG: SUB_INT
177; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]178; EG-DAG: CNDE_INT
179; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]180; EG-DAG: AND_INT
181; EG-DAG: LSHR
182; EG-DAG: SUB_INT
183; EG-DAG: AND_INT
184; EG-DAG: ASHR
185; EG-DAG: AND_INT
186; EG-DAG: OR_INT
187; EG-DAG: SUB_INT
188; EG-DAG: LSHL
189; EG-DAG: LSHL
190; EG-DAG: SUB_INT
191; EG-DAG: LSHR
192; EG-DAG: LSHR
193; EG-DAG: SETGT_UINT
194; EG-DAG: SETGT_INT
195; EG-DAG: XOR_INT
196; EG-DAG: XOR_INT
197; EG-DAG: SUB_INT
198; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]199; EG-DAG: CNDE_INT
200; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]201; EG-DAG: AND_INT
202; EG-DAG: LSHR
203; EG-DAG: SUB_INT
204; EG-DAG: AND_INT
205; EG-DAG: ASHR
206; EG-DAG: AND_INT
207; EG-DAG: OR_INT
208; EG-DAG: SUB_INT
209; EG-DAG: LSHL
210; EG-DAG: LSHL
211; EG-DAG: SUB_INT
212; EG-DAG: LSHR
213; EG-DAG: LSHR
214; EG-DAG: SETGT_UINT
215; EG-DAG: SETGT_INT
216; EG-DAG: XOR_INT
217; EG-DAG: XOR_INT
218; EG-DAG: SUB_INT
219; EG-DAG: SUB_INT
Chandler Carruth411fb402014-07-26 05:49:40 +0000[diff] [blame]220; EG-DAG: CNDE_INT
221; EG-DAG: CNDE_INT
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]222
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]223; SI: s_endpgm
Jan Vesely2cb62ce2014-07-10 22:40:21 +0000[diff] [blame]224define void @fp_to_sint_v4i64(<4 x i64> addrspace(1)* %out, <4 x float> %x) {
225 %conv = fptosi <4 x float> %x to <4 x i64>
226 store <4 x i64> %conv, <4 x i64> addrspace(1)* %out
227 ret void
228}
Matt Arsenault268757b2015-01-15 23:17:03 +0000[diff] [blame]229
230attributes #0 = { nounwind readnone }