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gerrit-public.fairphone.software / toolchain / llvm-project / bc041b82d44b51a3b7da79c38e4052e28ff8011c / . / llvm / test / CodeGen / AMDGPU / load-i1.ll
blob: 0ca49fde3e7bf93547e32c2b9c919882155323d1 [file] [log] [blame]
Tom Stellard49f8bfd2015-01-06 18:00:21 +0000[diff] [blame]1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Marek Olsak75170772015-01-27 17:27:15 +0000[diff] [blame]2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]3; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]4
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]5; FUNC-LABEL: {{^}}global_copy_i1_to_i1:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]6; SI: buffer_load_ubyte
7; SI: v_and_b32_e32 v{{[0-9]+}}, 1
8; SI: buffer_store_byte
9; SI: s_endpgm
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]10
11; EG: VTX_READ_8
12; EG: AND_INT
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]13define void @global_copy_i1_to_i1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]14 %load = load i1, i1 addrspace(1)* %in
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]15 store i1 %load, i1 addrspace(1)* %out, align 1
16 ret void
17}
18
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]19; FUNC-LABEL: {{^}}local_copy_i1_to_i1:
Matt Arsenaultb7ebdff2014-11-23 02:57:50 +0000[diff] [blame]20; SI: ds_read_u8
21; SI: v_and_b32_e32 v{{[0-9]+}}, 1
22; SI: ds_write_b8
23; SI: s_endpgm
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]24
25; EG: LDS_UBYTE_READ_RET
26; EG: AND_INT
27; EG: LDS_BYTE_WRITE
Matt Arsenaultb7ebdff2014-11-23 02:57:50 +0000[diff] [blame]28define void @local_copy_i1_to_i1(i1 addrspace(3)* %out, i1 addrspace(3)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]29 %load = load i1, i1 addrspace(3)* %in
Matt Arsenaultb7ebdff2014-11-23 02:57:50 +0000[diff] [blame]30 store i1 %load, i1 addrspace(3)* %out, align 1
31 ret void
32}
33
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]34; FUNC-LABEL: {{^}}constant_copy_i1_to_i1:
Matt Arsenaultb7ebdff2014-11-23 02:57:50 +0000[diff] [blame]35; SI: buffer_load_ubyte
36; SI: v_and_b32_e32 v{{[0-9]+}}, 1
37; SI: buffer_store_byte
38; SI: s_endpgm
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]39
40; EG: VTX_READ_8
41; EG: AND_INT
Matt Arsenaultb7ebdff2014-11-23 02:57:50 +0000[diff] [blame]42define void @constant_copy_i1_to_i1(i1 addrspace(1)* %out, i1 addrspace(2)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]43 %load = load i1, i1 addrspace(2)* %in
Matt Arsenaultb7ebdff2014-11-23 02:57:50 +0000[diff] [blame]44 store i1 %load, i1 addrspace(1)* %out, align 1
45 ret void
46}
47
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]48; FUNC-LABEL: {{^}}global_sextload_i1_to_i32:
Matt Arsenault79db0a72014-11-23 02:57:49 +0000[diff] [blame]49; SI: buffer_load_ubyte
50; SI: v_bfe_i32
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]51; SI: buffer_store_dword
52; SI: s_endpgm
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]53
54; EG: VTX_READ_8
55; EG: BFE_INT
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]56define void @global_sextload_i1_to_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]57 %load = load i1, i1 addrspace(1)* %in
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]58 %ext = sext i1 %load to i32
59 store i32 %ext, i32 addrspace(1)* %out, align 4
60 ret void
61}
62
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]63; FUNC-LABEL: {{^}}global_zextload_i1_to_i32:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]64; SI: buffer_load_ubyte
65; SI: buffer_store_dword
66; SI: s_endpgm
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]67
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]68define void @global_zextload_i1_to_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]69 %load = load i1, i1 addrspace(1)* %in
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]70 %ext = zext i1 %load to i32
71 store i32 %ext, i32 addrspace(1)* %out, align 4
72 ret void
73}
74
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]75; FUNC-LABEL: {{^}}global_sextload_i1_to_i64:
Matt Arsenault79db0a72014-11-23 02:57:49 +0000[diff] [blame]76; SI: buffer_load_ubyte
77; SI: v_bfe_i32
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]78; SI: buffer_store_dwordx2
79; SI: s_endpgm
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]80define void @global_sextload_i1_to_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]81 %load = load i1, i1 addrspace(1)* %in
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]82 %ext = sext i1 %load to i64
83 store i64 %ext, i64 addrspace(1)* %out, align 4
84 ret void
85}
86
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]87; FUNC-LABEL: {{^}}global_zextload_i1_to_i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]88; SI: buffer_load_ubyte
Matt Arsenault79db0a72014-11-23 02:57:49 +0000[diff] [blame]89; SI: v_mov_b32_e32 {{v[0-9]+}}, 0
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]90; SI: buffer_store_dwordx2
91; SI: s_endpgm
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]92define void @global_zextload_i1_to_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]93 %load = load i1, i1 addrspace(1)* %in
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]94 %ext = zext i1 %load to i64
95 store i64 %ext, i64 addrspace(1)* %out, align 4
96 ret void
97}
98
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]99; FUNC-LABEL: {{^}}i1_arg:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]100; SI: buffer_load_ubyte
101; SI: v_and_b32_e32
102; SI: buffer_store_byte
103; SI: s_endpgm
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]104define void @i1_arg(i1 addrspace(1)* %out, i1 %x) nounwind {
105 store i1 %x, i1 addrspace(1)* %out, align 1
106 ret void
107}
108
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]109; FUNC-LABEL: {{^}}i1_arg_zext_i32:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]110; SI: buffer_load_ubyte
111; SI: buffer_store_dword
112; SI: s_endpgm
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]113define void @i1_arg_zext_i32(i32 addrspace(1)* %out, i1 %x) nounwind {
114 %ext = zext i1 %x to i32
115 store i32 %ext, i32 addrspace(1)* %out, align 4
116 ret void
117}
118
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]119; FUNC-LABEL: {{^}}i1_arg_zext_i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]120; SI: buffer_load_ubyte
121; SI: buffer_store_dwordx2
122; SI: s_endpgm
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]123define void @i1_arg_zext_i64(i64 addrspace(1)* %out, i1 %x) nounwind {
124 %ext = zext i1 %x to i64
125 store i64 %ext, i64 addrspace(1)* %out, align 8
126 ret void
127}
128
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]129; FUNC-LABEL: {{^}}i1_arg_sext_i32:
Matt Arsenault79db0a72014-11-23 02:57:49 +0000[diff] [blame]130; SI: buffer_load_ubyte
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]131; SI: buffer_store_dword
132; SI: s_endpgm
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]133define void @i1_arg_sext_i32(i32 addrspace(1)* %out, i1 %x) nounwind {
134 %ext = sext i1 %x to i32
135 store i32 %ext, i32addrspace(1)* %out, align 4
136 ret void
137}
138
Matt Arsenault2a495972014-11-23 02:57:54 +0000[diff] [blame]139; FUNC-LABEL: {{^}}i1_arg_sext_i64:
Matt Arsenault79db0a72014-11-23 02:57:49 +0000[diff] [blame]140; SI: buffer_load_ubyte
141; SI: v_bfe_i32
142; SI: v_ashrrev_i32
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]143; SI: buffer_store_dwordx2
144; SI: s_endpgm
Matt Arsenault470acd82014-04-15 22:28:39 +0000[diff] [blame]145define void @i1_arg_sext_i64(i64 addrspace(1)* %out, i1 %x) nounwind {
146 %ext = sext i1 %x to i64
147 store i64 %ext, i64 addrspace(1)* %out, align 8
148 ret void
149}