Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s |
| 2 | ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s |
Tom Stellard | 046039e | 2013-06-03 17:40:03 +0000 | [diff] [blame] | 3 | |
Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 4 | ; GCN-LABEL: {{^}}s_sext_i1_to_i32: |
| 5 | ; GCN: v_cndmask_b32_e64 |
| 6 | ; GCN: s_endpgm |
Matt Arsenault | b2cbf79 | 2014-06-10 18:54:59 +0000 | [diff] [blame] | 7 | define void @s_sext_i1_to_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind { |
| 8 | %cmp = icmp eq i32 %a, %b |
| 9 | %sext = sext i1 %cmp to i32 |
| 10 | store i32 %sext, i32 addrspace(1)* %out, align 4 |
| 11 | ret void |
| 12 | } |
Tom Stellard | 046039e | 2013-06-03 17:40:03 +0000 | [diff] [blame] | 13 | |
Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 14 | ; GCN-LABEL: {{^}}test_s_sext_i32_to_i64: |
| 15 | ; GCN: s_ashr_i32 |
| 16 | ; GCN: s_endpg |
Matt Arsenault | 869cd07 | 2014-09-03 23:24:35 +0000 | [diff] [blame] | 17 | define void @test_s_sext_i32_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) nounwind { |
Tom Stellard | 046039e | 2013-06-03 17:40:03 +0000 | [diff] [blame] | 18 | entry: |
Matt Arsenault | b2cbf79 | 2014-06-10 18:54:59 +0000 | [diff] [blame] | 19 | %mul = mul i32 %a, %b |
| 20 | %add = add i32 %mul, %c |
| 21 | %sext = sext i32 %add to i64 |
| 22 | store i64 %sext, i64 addrspace(1)* %out, align 8 |
| 23 | ret void |
| 24 | } |
| 25 | |
Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 26 | ; GCN-LABEL: {{^}}s_sext_i1_to_i64: |
| 27 | ; GCN: v_cndmask_b32_e64 v[[LOREG:[0-9]+]], 0, -1, vcc |
| 28 | ; GCN: v_mov_b32_e32 v[[HIREG:[0-9]+]], v[[LOREG]] |
| 29 | ; GCN: buffer_store_dwordx2 v{{\[}}[[LOREG]]:[[HIREG]]{{\]}} |
| 30 | ; GCN: s_endpgm |
Matt Arsenault | b2cbf79 | 2014-06-10 18:54:59 +0000 | [diff] [blame] | 31 | define void @s_sext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind { |
| 32 | %cmp = icmp eq i32 %a, %b |
| 33 | %sext = sext i1 %cmp to i64 |
| 34 | store i64 %sext, i64 addrspace(1)* %out, align 8 |
| 35 | ret void |
| 36 | } |
| 37 | |
Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 38 | ; GCN-LABEL: {{^}}s_sext_i32_to_i64: |
| 39 | ; GCN: s_ashr_i32 |
| 40 | ; GCN: s_endpgm |
Matt Arsenault | b2cbf79 | 2014-06-10 18:54:59 +0000 | [diff] [blame] | 41 | define void @s_sext_i32_to_i64(i64 addrspace(1)* %out, i32 %a) nounwind { |
| 42 | %sext = sext i32 %a to i64 |
| 43 | store i64 %sext, i64 addrspace(1)* %out, align 8 |
| 44 | ret void |
| 45 | } |
| 46 | |
Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 47 | ; GCN-LABEL: {{^}}v_sext_i32_to_i64: |
| 48 | ; GCN: v_ashr |
| 49 | ; GCN: s_endpgm |
Matt Arsenault | b2cbf79 | 2014-06-10 18:54:59 +0000 | [diff] [blame] | 50 | define void @v_sext_i32_to_i64(i64 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { |
David Blaikie | a79ac14 | 2015-02-27 21:17:42 +0000 | [diff] [blame] | 51 | %val = load i32, i32 addrspace(1)* %in, align 4 |
Matt Arsenault | b2cbf79 | 2014-06-10 18:54:59 +0000 | [diff] [blame] | 52 | %sext = sext i32 %val to i64 |
| 53 | store i64 %sext, i64 addrspace(1)* %out, align 8 |
| 54 | ret void |
| 55 | } |
| 56 | |
Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 57 | ; GCN-LABEL: {{^}}s_sext_i16_to_i64: |
| 58 | ; GCN: s_endpgm |
Matt Arsenault | b2cbf79 | 2014-06-10 18:54:59 +0000 | [diff] [blame] | 59 | define void @s_sext_i16_to_i64(i64 addrspace(1)* %out, i16 %a) nounwind { |
| 60 | %sext = sext i16 %a to i64 |
| 61 | store i64 %sext, i64 addrspace(1)* %out, align 8 |
Tom Stellard | 046039e | 2013-06-03 17:40:03 +0000 | [diff] [blame] | 62 | ret void |
| 63 | } |
Matt Arsenault | 7e8de01 | 2016-04-22 22:59:16 +0000 | [diff] [blame] | 64 | |
| 65 | ; GCN-LABEL: {{^}}s_sext_v4i8_to_v4i32: |
| 66 | ; GCN: s_load_dword [[VAL:s[0-9]+]] |
| 67 | ; GCN-DAG: s_sext_i32_i8 [[EXT0:s[0-9]+]], [[VAL]] |
| 68 | ; GCN-DAG: s_bfe_i32 [[EXT1:s[0-9]+]], [[VAL]], 0x80008 |
| 69 | ; GCN-DAG: s_bfe_i32 [[EXT2:s[0-9]+]], [[VAL]], 0x80010 |
| 70 | ; GCN-DAG: s_ashr_i32 [[EXT3:s[0-9]+]], [[VAL]], 24 |
| 71 | |
| 72 | ; GCN-DAG: v_mov_b32_e32 [[VEXT0:v[0-9]+]], [[EXT0]] |
| 73 | ; GCN-DAG: v_mov_b32_e32 [[VEXT1:v[0-9]+]], [[EXT1]] |
| 74 | ; GCN-DAG: v_mov_b32_e32 [[VEXT2:v[0-9]+]], [[EXT2]] |
| 75 | ; GCN-DAG: v_mov_b32_e32 [[VEXT3:v[0-9]+]], [[EXT3]] |
| 76 | |
| 77 | ; GCN-DAG: buffer_store_dword [[VEXT0]] |
| 78 | ; GCN-DAG: buffer_store_dword [[VEXT1]] |
| 79 | ; GCN-DAG: buffer_store_dword [[VEXT2]] |
| 80 | ; GCN-DAG: buffer_store_dword [[VEXT3]] |
| 81 | |
| 82 | ; GCN: s_endpgm |
| 83 | define void @s_sext_v4i8_to_v4i32(i32 addrspace(1)* %out, i32 %a) nounwind { |
| 84 | %cast = bitcast i32 %a to <4 x i8> |
| 85 | %ext = sext <4 x i8> %cast to <4 x i32> |
| 86 | %elt0 = extractelement <4 x i32> %ext, i32 0 |
| 87 | %elt1 = extractelement <4 x i32> %ext, i32 1 |
| 88 | %elt2 = extractelement <4 x i32> %ext, i32 2 |
| 89 | %elt3 = extractelement <4 x i32> %ext, i32 3 |
| 90 | store volatile i32 %elt0, i32 addrspace(1)* %out |
| 91 | store volatile i32 %elt1, i32 addrspace(1)* %out |
| 92 | store volatile i32 %elt2, i32 addrspace(1)* %out |
| 93 | store volatile i32 %elt3, i32 addrspace(1)* %out |
| 94 | ret void |
| 95 | } |
| 96 | |
| 97 | ; GCN-LABEL: {{^}}v_sext_v4i8_to_v4i32: |
| 98 | ; GCN: buffer_load_dword [[VAL:v[0-9]+]] |
| 99 | ; GCN-DAG: v_bfe_i32 [[EXT0:v[0-9]+]], [[VAL]], 0, 8 |
| 100 | ; GCN-DAG: v_bfe_i32 [[EXT1:v[0-9]+]], [[VAL]], 8, 8 |
| 101 | ; GCN-DAG: v_bfe_i32 [[EXT2:v[0-9]+]], [[VAL]], 16, 8 |
| 102 | ; GCN-DAG: v_ashrrev_i32_e32 [[EXT3:v[0-9]+]], 24, [[VAL]] |
| 103 | |
| 104 | ; GCN: buffer_store_dword [[EXT0]] |
| 105 | ; GCN: buffer_store_dword [[EXT1]] |
| 106 | ; GCN: buffer_store_dword [[EXT2]] |
| 107 | ; GCN: buffer_store_dword [[EXT3]] |
| 108 | define void @v_sext_v4i8_to_v4i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { |
| 109 | %a = load i32, i32 addrspace(1)* %in |
| 110 | %cast = bitcast i32 %a to <4 x i8> |
| 111 | %ext = sext <4 x i8> %cast to <4 x i32> |
| 112 | %elt0 = extractelement <4 x i32> %ext, i32 0 |
| 113 | %elt1 = extractelement <4 x i32> %ext, i32 1 |
| 114 | %elt2 = extractelement <4 x i32> %ext, i32 2 |
| 115 | %elt3 = extractelement <4 x i32> %ext, i32 3 |
| 116 | store volatile i32 %elt0, i32 addrspace(1)* %out |
| 117 | store volatile i32 %elt1, i32 addrspace(1)* %out |
| 118 | store volatile i32 %elt2, i32 addrspace(1)* %out |
| 119 | store volatile i32 %elt3, i32 addrspace(1)* %out |
| 120 | ret void |
| 121 | } |
| 122 | |
| 123 | ; FIXME: s_bfe_i64 |
| 124 | ; GCN-LABEL: {{^}}s_sext_v4i16_to_v4i32: |
| 125 | ; GCN-DAG: s_ashr_i64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 48 |
| 126 | ; GCN-DAG: s_ashr_i32 s{{[0-9]+}}, s{{[0-9]+}}, 16 |
| 127 | ; GCN-DAG: s_sext_i32_i16 |
| 128 | ; GCN-DAG: s_sext_i32_i16 |
| 129 | ; GCN: s_endpgm |
| 130 | define void @s_sext_v4i16_to_v4i32(i32 addrspace(1)* %out, i64 %a) nounwind { |
| 131 | %cast = bitcast i64 %a to <4 x i16> |
| 132 | %ext = sext <4 x i16> %cast to <4 x i32> |
| 133 | %elt0 = extractelement <4 x i32> %ext, i32 0 |
| 134 | %elt1 = extractelement <4 x i32> %ext, i32 1 |
| 135 | %elt2 = extractelement <4 x i32> %ext, i32 2 |
| 136 | %elt3 = extractelement <4 x i32> %ext, i32 3 |
| 137 | store volatile i32 %elt0, i32 addrspace(1)* %out |
| 138 | store volatile i32 %elt1, i32 addrspace(1)* %out |
| 139 | store volatile i32 %elt2, i32 addrspace(1)* %out |
| 140 | store volatile i32 %elt3, i32 addrspace(1)* %out |
| 141 | ret void |
| 142 | } |
| 143 | |
| 144 | ; GCN-LABEL: {{^}}v_sext_v4i16_to_v4i32: |
| 145 | ; SI-DAG: v_ashr_i64 v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, 48 |
| 146 | ; VI-DAG: v_ashrrev_i64 v{{\[[0-9]+:[0-9]+\]}}, 48, v{{\[[0-9]+:[0-9]+\]}} |
| 147 | ; GCN-DAG: v_ashrrev_i32_e32 v{{[0-9]+}}, 16, v{{[0-9]+}} |
| 148 | ; GCN-DAG: v_ashrrev_i32_e32 v{{[0-9]+}}, 16, v{{[0-9]+}} |
| 149 | ; GCN-DAG: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 16 |
| 150 | ; GCN-DAG: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 16 |
| 151 | ; GCN: s_endpgm |
| 152 | define void @v_sext_v4i16_to_v4i32(i32 addrspace(1)* %out, i64 addrspace(1)* %in) nounwind { |
| 153 | %a = load i64, i64 addrspace(1)* %in |
| 154 | %cast = bitcast i64 %a to <4 x i16> |
| 155 | %ext = sext <4 x i16> %cast to <4 x i32> |
| 156 | %elt0 = extractelement <4 x i32> %ext, i32 0 |
| 157 | %elt1 = extractelement <4 x i32> %ext, i32 1 |
| 158 | %elt2 = extractelement <4 x i32> %ext, i32 2 |
| 159 | %elt3 = extractelement <4 x i32> %ext, i32 3 |
| 160 | store volatile i32 %elt0, i32 addrspace(1)* %out |
| 161 | store volatile i32 %elt1, i32 addrspace(1)* %out |
| 162 | store volatile i32 %elt2, i32 addrspace(1)* %out |
| 163 | store volatile i32 %elt3, i32 addrspace(1)* %out |
| 164 | ret void |
| 165 | } |