blob: b55e12960fa653e26f5a95d11cd3431e5ad67768 [file] [log] [blame]
Bill Schmidt2d1128a2014-10-17 15:13:38 +00001; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -mattr=-vsx -verify-machineinstrs < %s | FileCheck %s
Bill Schmidt941a3242014-10-19 21:29:21 +00002; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec -mattr=-vsx -verify-machineinstrs -fast-isel=false -mcpu=pwr7 < %s | FileCheck %s
3; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec -mattr=+vsx -verify-machineinstrs -fast-isel=false -mcpu=pwr7 < %s | FileCheck -check-prefix=CHECK-VSX %s
Bill Schmidtb9bc4742012-10-10 21:25:01 +00004
5; This verifies that we generate correct spill/reload code for vector regs.
6
7define void @addrtaken(i32 %i, <4 x float> %w) nounwind {
8entry:
9 %i.addr = alloca i32, align 4
10 %w.addr = alloca <4 x float>, align 16
11 store i32 %i, i32* %i.addr, align 4
12 store <4 x float> %w, <4 x float>* %w.addr, align 16
13 call void @foo(i32* %i.addr)
14 ret void
15}
16
Bill Schmidt4a28e822013-06-13 20:23:34 +000017; CHECK: stvx 2,
Bill Schmidtb9bc4742012-10-10 21:25:01 +000018
Bill Schmidt2d1128a2014-10-17 15:13:38 +000019; We would prefer to test for "stxvw4x 34," but current -O0 code
20; needlessly generates "vor 3,2,2 / stxvw4x 35,0,3", so we'll settle for
21; the opcode.
22; CHECK-VSX: stxvw4x
23
Bill Schmidtb9bc4742012-10-10 21:25:01 +000024declare void @foo(i32*)