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gerrit-public.fairphone.software / toolchain / llvm-project / bc041b82d44b51a3b7da79c38e4052e28ff8011c / . / llvm / test / CodeGen / X86 / switch-edge-weight.ll
blob: 3679433c372f2afdf83625934c3be4402e0f701b [file] [log] [blame]
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]1; RUN: llc -march=x86-64 -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
2
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]3declare void @foo(i32)
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]4
5; CHECK-LABEL: test
6
7define void @test(i32 %x) nounwind {
8entry:
9 switch i32 %x, label %sw.default [
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]10 i32 1, label %sw.bb
11 i32 155, label %sw.bb
12 i32 156, label %sw.bb
13 i32 157, label %sw.bb
14 i32 158, label %sw.bb
15 i32 159, label %sw.bb
16 i32 1134, label %sw.bb
17 i32 1140, label %sw.bb
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]18 ], !prof !1
19
20sw.bb:
21 call void @foo(i32 0)
22 br label %sw.epilog
23
24sw.default:
25 call void @foo(i32 1)
26 br label %sw.epilog
27
28sw.epilog:
29 ret void
30
31; Check if weights are correctly assigned to edges generated from switch
32; statement.
33;
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]34; CHECK: BB#0:
35; BB#0 to BB#4: [0, 1133] (65 = 60 + 5)
36; BB#0 to BB#5: [1134, UINT32_MAX] (25 = 20 + 5)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]37; CHECK: Successors according to CFG: BB#4({{[0-9a-fx/= ]+}}72.22%) BB#5({{[0-9a-fx/= ]+}}27.78%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]38;
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]39; CHECK: BB#4:
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]40; BB#4 to BB#1: [155, 159] (50)
41; BB#4 to BB#5: [0, 1133] - [155, 159] (15 = 10 + 5)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]42; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}76.92%) BB#7({{[0-9a-fx/= ]+}}23.08%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]43;
44; CHECK: BB#5:
45; BB#5 to BB#1: {1140} (10)
46; BB#5 to BB#6: [1134, UINT32_MAX] - {1140} (15 = 10 + 5)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]47; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}40.00%) BB#6({{[0-9a-fx/= ]+}}60.00%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]48;
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]49; CHECK: BB#6:
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]50; BB#6 to BB#1: {1134} (10)
51; BB#6 to BB#2: [1134, UINT32_MAX] - {1134, 1140} (5)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]52; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}66.67%) BB#2({{[0-9a-fx/= ]+}}33.33%)
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]53}
54
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]55; CHECK-LABEL: test2
56
57define void @test2(i32 %x) nounwind {
58entry:
59
60; In this switch statement, there is an edge from jump table to default
61; statement.
62
63 switch i32 %x, label %sw.default [
64 i32 1, label %sw.bb
65 i32 10, label %sw.bb2
66 i32 11, label %sw.bb3
67 i32 12, label %sw.bb4
68 i32 13, label %sw.bb5
69 i32 14, label %sw.bb5
70 ], !prof !3
71
72sw.bb:
73 call void @foo(i32 0)
74 br label %sw.epilog
75
76sw.bb2:
77 call void @foo(i32 2)
78 br label %sw.epilog
79
80sw.bb3:
81 call void @foo(i32 3)
82 br label %sw.epilog
83
84sw.bb4:
85 call void @foo(i32 4)
86 br label %sw.epilog
87
88sw.bb5:
89 call void @foo(i32 5)
90 br label %sw.epilog
91
92sw.default:
93 call void @foo(i32 1)
94 br label %sw.epilog
95
96sw.epilog:
97 ret void
98
99; Check if weights are correctly assigned to edges generated from switch
100; statement.
101;
102; CHECK: BB#0:
103; BB#0 to BB#6: {0} + [15, UINT32_MAX] (5)
104; BB#0 to BB#8: [1, 14] (jump table) (65 = 60 + 5)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]105; CHECK: Successors according to CFG: BB#6({{[0-9a-fx/= ]+}}7.14%) BB#8({{[0-9a-fx/= ]+}}92.86%
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]106;
107; CHECK: BB#8:
108; BB#8 to BB#1: {1} (10)
109; BB#8 to BB#6: [2, 9] (5)
110; BB#8 to BB#2: {10} (10)
111; BB#8 to BB#3: {11} (10)
112; BB#8 to BB#4: {12} (10)
113; BB#8 to BB#5: {13, 14} (20)
Cong Hou833fe142015-12-05 05:00:55 +0000[diff] [blame]114; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}15.38%) BB#6({{[0-9a-fx/= ]+}}7.69%) BB#2({{[0-9a-fx/= ]+}}15.38%) BB#3({{[0-9a-fx/= ]+}}15.38%) BB#4({{[0-9a-fx/= ]+}}15.38%) BB#5({{[0-9a-fx/= ]+}}30.77%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]115}
116
117; CHECK-LABEL: test3
118
119define void @test3(i32 %x) nounwind {
120entry:
121
122; In this switch statement, there is no edge from jump table to default
123; statement.
124
125 switch i32 %x, label %sw.default [
126 i32 10, label %sw.bb
127 i32 11, label %sw.bb2
128 i32 12, label %sw.bb3
129 i32 13, label %sw.bb4
130 i32 14, label %sw.bb5
131 ], !prof !2
132
133sw.bb:
134 call void @foo(i32 0)
135 br label %sw.epilog
136
137sw.bb2:
138 call void @foo(i32 2)
139 br label %sw.epilog
140
141sw.bb3:
142 call void @foo(i32 3)
143 br label %sw.epilog
144
145sw.bb4:
146 call void @foo(i32 4)
147 br label %sw.epilog
148
149sw.bb5:
150 call void @foo(i32 5)
151 br label %sw.epilog
152
153sw.default:
154 call void @foo(i32 1)
155 br label %sw.epilog
156
157sw.epilog:
158 ret void
159
160; Check if weights are correctly assigned to edges generated from switch
161; statement.
162;
163; CHECK: BB#0:
164; BB#0 to BB#6: [0, 9] + [15, UINT32_MAX] {10}
165; BB#0 to BB#8: [10, 14] (jump table) (50)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]166; CHECK: Successors according to CFG: BB#6({{[0-9a-fx/= ]+}}16.67%) BB#8({{[0-9a-fx/= ]+}}83.33%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]167;
168; CHECK: BB#8:
169; BB#8 to BB#1: {10} (10)
170; BB#8 to BB#2: {11} (10)
171; BB#8 to BB#3: {12} (10)
172; BB#8 to BB#4: {13} (10)
173; BB#8 to BB#5: {14} (10)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]174; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}20.00%) BB#2({{[0-9a-fx/= ]+}}20.00%) BB#3({{[0-9a-fx/= ]+}}20.00%) BB#4({{[0-9a-fx/= ]+}}20.00%) BB#5({{[0-9a-fx/= ]+}}20.00%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]175}
176
177; CHECK-LABEL: test4
178
179define void @test4(i32 %x) nounwind {
180entry:
181
182; In this switch statement, there is no edge from bit test to default basic
183; block.
184
185 switch i32 %x, label %sw.default [
186 i32 1, label %sw.bb
187 i32 111, label %sw.bb2
188 i32 112, label %sw.bb3
189 i32 113, label %sw.bb3
190 i32 114, label %sw.bb2
191 i32 115, label %sw.bb2
192 ], !prof !3
193
194sw.bb:
195 call void @foo(i32 0)
196 br label %sw.epilog
197
198sw.bb2:
199 call void @foo(i32 2)
200 br label %sw.epilog
201
202sw.bb3:
203 call void @foo(i32 3)
204 br label %sw.epilog
205
206sw.default:
207 call void @foo(i32 1)
208 br label %sw.epilog
209
210sw.epilog:
211 ret void
212
213; Check if weights are correctly assigned to edges generated from switch
214; statement.
215;
216; CHECK: BB#0:
217; BB#0 to BB#6: [0, 110] + [116, UINT32_MAX] (20)
218; BB#0 to BB#7: [111, 115] (bit test) (50)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]219; CHECK: Successors according to CFG: BB#6({{[0-9a-fx/= ]+}}28.57%) BB#7({{[0-9a-fx/= ]+}}71.43%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]220;
221; CHECK: BB#7:
222; BB#7 to BB#2: {111, 114, 115} (30)
223; BB#7 to BB#3: {112, 113} (20)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]224; CHECK: Successors according to CFG: BB#2({{[0-9a-fx/= ]+}}60.00%) BB#3({{[0-9a-fx/= ]+}}40.00%)
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]225}
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]226
Cong Houb54a72e2015-09-23 00:34:56 +0000[diff] [blame]227; CHECK-LABEL: test5
228
229define void @test5(i32 %x) nounwind {
230entry:
231
232; In this switch statement, there is an edge from jump table to default basic
233; block.
234
235 switch i32 %x, label %sw.default [
Kyle Butt5e241b12016-03-29 00:23:41 +0000[diff] [blame]236 i32 4, label %sw.bb
237 i32 20, label %sw.bb2
238 i32 28, label %sw.bb3
239 i32 36, label %sw.bb4
240 i32 124, label %sw.bb5
Cong Houb54a72e2015-09-23 00:34:56 +0000[diff] [blame]241 ], !prof !2
242
243sw.bb:
244 call void @foo(i32 0)
245 br label %sw.epilog
246
247sw.bb2:
248 call void @foo(i32 1)
249 br label %sw.epilog
250
251sw.bb3:
252 call void @foo(i32 2)
253 br label %sw.epilog
254
255sw.bb4:
256 call void @foo(i32 3)
257 br label %sw.epilog
258
259sw.bb5:
260 call void @foo(i32 4)
261 br label %sw.epilog
262
263sw.default:
264 call void @foo(i32 5)
265 br label %sw.epilog
266
267sw.epilog:
268 ret void
269
270; Check if weights are correctly assigned to edges generated from switch
271; statement.
272;
273; CHECK: BB#0:
274; BB#0 to BB#6: [10, UINT32_MAX] (15)
Kyle Butt5e241b12016-03-29 00:23:41 +0000[diff] [blame]275; BB#0 to BB#8: [4, 20, 28, 36] (jump table) (45)
Cong Houd97c1002015-12-01 05:29:22 +0000[diff] [blame]276; CHECK: Successors according to CFG: BB#8({{[0-9a-fx/= ]+}}25.00%) BB#9({{[0-9a-fx/= ]+}}75.00%)
Cong Houb54a72e2015-09-23 00:34:56 +0000[diff] [blame]277}
278
Cong Hou08cb4fc2015-08-27 00:37:40 +0000[diff] [blame]279!1 = !{!"branch_weights", i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10}
Cong Hou511298b2015-09-01 01:42:16 +0000[diff] [blame]280!2 = !{!"branch_weights", i32 10, i32 10, i32 10, i32 10, i32 10, i32 10}
281!3 = !{!"branch_weights", i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10}