Chad Rosier | 468f1df | 2012-10-24 23:34:38 +0000 | [diff] [blame] | 1 | // RUN: llvm-mc -x86-asm-syntax=intel -triple i386-unknown-unknown --show-encoding %s | FileCheck %s |
Chad Rosier | dd5eada | 2012-10-24 23:10:28 +0000 | [diff] [blame] | 2 | |
Chad Rosier | dd5eada | 2012-10-24 23:10:28 +0000 | [diff] [blame] | 3 | mov eax, [ebx].0 |
| 4 | mov [ebx].4, ecx |
Chad Rosier | 468f1df | 2012-10-24 23:34:38 +0000 | [diff] [blame] | 5 | |
| 6 | // CHECK: movl (%ebx), %eax |
| 7 | // CHECK: encoding: [0x8b,0x03] |
| 8 | // CHECK: movl %ecx, 4(%ebx) |
| 9 | // CHECK: encoding: [0x89,0x4b,0x04] |
Chad Rosier | dd5eada | 2012-10-24 23:10:28 +0000 | [diff] [blame] | 10 | |
Chad Rosier | 1bbaa44 | 2012-10-29 18:01:54 +0000 | [diff] [blame] | 11 | _t21: ## @t21 |
| 12 | // CHECK: t21 |
| 13 | mov eax, [4*eax + 4] |
| 14 | // CHECK: movl 4(,%eax,4), %eax |
| 15 | // CHECK: # encoding: [0x8b,0x04,0x85,0x04,0x00,0x00,0x00] |
| 16 | mov eax, [4*eax][4] |
| 17 | // CHECK: movl 4(,%eax,4), %eax |
| 18 | // CHECK: # encoding: [0x8b,0x04,0x85,0x04,0x00,0x00,0x00] |
| 19 | |
| 20 | mov eax, [esi + eax] |
| 21 | // CHECK: movl (%esi,%eax), %eax |
| 22 | // CHECK: # encoding: [0x8b,0x04,0x06] |
| 23 | mov eax, [esi][eax] |
| 24 | // CHECK: movl (%esi,%eax), %eax |
| 25 | // CHECK: # encoding: [0x8b,0x04,0x06] |
| 26 | |
| 27 | mov eax, [esi + 4*eax] |
| 28 | // CHECK: movl (%esi,%eax,4), %eax |
| 29 | // CHECK: # encoding: [0x8b,0x04,0x86] |
| 30 | mov eax, [esi][4*eax] |
| 31 | // CHECK: movl (%esi,%eax,4), %eax |
| 32 | // CHECK: # encoding: [0x8b,0x04,0x86] |
| 33 | |
| 34 | mov eax, [esi + eax + 4] |
| 35 | // CHECK: movl 4(%esi,%eax), %eax |
| 36 | // CHECK: # encoding: [0x8b,0x44,0x06,0x04] |
| 37 | mov eax, [esi][eax + 4] |
| 38 | // CHECK: movl 4(%esi,%eax), %eax |
| 39 | // CHECK: # encoding: [0x8b,0x44,0x06,0x04] |
| 40 | mov eax, [esi + eax][4] |
| 41 | // CHECK: movl 4(%esi,%eax), %eax |
| 42 | // CHECK: # encoding: [0x8b,0x44,0x06,0x04] |
| 43 | mov eax, [esi][eax][4] |
| 44 | // CHECK: movl 4(%esi,%eax), %eax |
| 45 | // CHECK: # encoding: [0x8b,0x44,0x06,0x04] |
| 46 | |
| 47 | mov eax, [esi + 2*eax + 4] |
| 48 | // CHECK: movl 4(%esi,%eax,2), %eax |
| 49 | // CHECK: # encoding: [0x8b,0x44,0x46,0x04] |
| 50 | mov eax, [esi][2*eax + 4] |
| 51 | // CHECK: movl 4(%esi,%eax,2), %eax |
| 52 | // CHECK: # encoding: [0x8b,0x44,0x46,0x04] |
| 53 | mov eax, [esi + 2*eax][4] |
| 54 | // CHECK: movl 4(%esi,%eax,2), %eax |
| 55 | // CHECK: # encoding: [0x8b,0x44,0x46,0x04] |
| 56 | mov eax, [esi][2*eax][4] |
| 57 | // CHECK: movl 4(%esi,%eax,2), %eax |
| 58 | // CHECK: # encoding: [0x8b,0x44,0x46,0x04] |
| 59 | |
Chad Rosier | 1530ba5 | 2013-03-27 21:49:56 +0000 | [diff] [blame] | 60 | mov eax, 4[esi + 2*eax + 4] |
| 61 | // CHECK: movl 8(%esi,%eax,2), %eax |
| 62 | // CHECK: # encoding: [0x8b,0x44,0x46,0x08] |
| 63 | mov eax, 4[esi][2*eax + 4] |
| 64 | // CHECK: movl 8(%esi,%eax,2), %eax |
| 65 | // CHECK: # encoding: [0x8b,0x44,0x46,0x08] |
| 66 | mov eax, 4[esi + 2*eax][4] |
| 67 | // CHECK: movl 8(%esi,%eax,2), %eax |
| 68 | // CHECK: # encoding: [0x8b,0x44,0x46,0x08] |
| 69 | mov eax, 4[esi][2*eax][4] |
| 70 | // CHECK: movl 8(%esi,%eax,2), %eax |
| 71 | // CHECK: # encoding: [0x8b,0x44,0x46,0x08] |
| 72 | mov eax, 4[esi][2*eax][4][8] |
| 73 | // CHECK: movl 16(%esi,%eax,2), %eax |
| 74 | // CHECK: # encoding: [0x8b,0x44,0x46,0x10] |
| 75 | |
| 76 | prefetchnta 64[eax] |
| 77 | // CHECK: prefetchnta 64(%eax) |
| 78 | // CHECK: # encoding: [0x0f,0x18,0x40,0x40] |
| 79 | |
Chad Rosier | 669bb3e | 2013-02-25 19:06:27 +0000 | [diff] [blame] | 80 | pusha |
| 81 | // CHECK: pushal |
| 82 | // CHECK: # encoding: [0x60] |
| 83 | popa |
| 84 | // CHECK: popal |
| 85 | // CHECK: # encoding: [0x61] |
| 86 | pushad |
| 87 | // CHECK: pushal |
| 88 | // CHECK: # encoding: [0x60] |
| 89 | popad |
| 90 | // CHECK: popal |
| 91 | // CHECK: # encoding: [0x61] |
| 92 | |
Hans Wennborg | f6aafee | 2014-10-14 21:41:17 +0000 | [diff] [blame] | 93 | fwait |
| 94 | // CHECK: wait |
| 95 | // CHECK: # encoding: [0x9b] |
| 96 | |
Chad Rosier | 1bbaa44 | 2012-10-29 18:01:54 +0000 | [diff] [blame] | 97 | ret |