| Shiva Chen | 056d835 | 2018-01-26 07:53:07 +0000 | [diff] [blame] | 1 | //===-- RISCVTargetStreamer.h - RISCV Target Streamer ----------*- C++ -*--===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | |
| 10 | #ifndef LLVM_LIB_TARGET_RISCV_RISCVTARGETSTREAMER_H |
| 11 | #define LLVM_LIB_TARGET_RISCV_RISCVTARGETSTREAMER_H |
| 12 | |
| 13 | #include "llvm/MC/MCStreamer.h" |
| 14 | |
| 15 | namespace llvm { |
| 16 | |
| 17 | class RISCVTargetStreamer : public MCTargetStreamer { |
| 18 | public: |
| 19 | RISCVTargetStreamer(MCStreamer &S); |
| Alex Bradbury | bca0c3c | 2018-05-11 17:30:28 +0000 | [diff] [blame^] | 20 | |
| 21 | virtual void emitDirectiveOptionRVC() = 0; |
| 22 | virtual void emitDirectiveOptionNoRVC() = 0; |
| Shiva Chen | 056d835 | 2018-01-26 07:53:07 +0000 | [diff] [blame] | 23 | }; |
| Alex Bradbury | bca0c3c | 2018-05-11 17:30:28 +0000 | [diff] [blame^] | 24 | |
| 25 | // This part is for ascii assembly output |
| 26 | class RISCVTargetAsmStreamer : public RISCVTargetStreamer { |
| 27 | formatted_raw_ostream &OS; |
| 28 | |
| 29 | public: |
| 30 | RISCVTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS); |
| 31 | |
| 32 | void emitDirectiveOptionRVC() override; |
| 33 | void emitDirectiveOptionNoRVC() override; |
| 34 | }; |
| 35 | |
| Shiva Chen | 056d835 | 2018-01-26 07:53:07 +0000 | [diff] [blame] | 36 | } |
| 37 | #endif |