Simon Pilgrim | bdbf839 | 2015-10-10 22:21:05 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 |
| 2 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41 |
| 3 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE42 |
| 4 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 |
| 5 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 |
| 6 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1 |
| 7 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2 |
| 8 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F |
| 9 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW |
| 10 | |
| 11 | ; |
| 12 | ; Equal |
| 13 | ; |
| 14 | |
| 15 | define <2 x i64> @eq_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { |
| 16 | ; SSE2-LABEL: eq_v2i64: |
| 17 | ; SSE2: # BB#0: |
| 18 | ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 |
| 19 | ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2] |
| 20 | ; SSE2-NEXT: pand %xmm1, %xmm0 |
| 21 | ; SSE2-NEXT: retq |
| 22 | ; |
| 23 | ; SSE41-LABEL: eq_v2i64: |
| 24 | ; SSE41: # BB#0: |
| 25 | ; SSE41-NEXT: pcmpeqq %xmm1, %xmm0 |
| 26 | ; SSE41-NEXT: retq |
| 27 | ; |
| 28 | ; SSE42-LABEL: eq_v2i64: |
| 29 | ; SSE42: # BB#0: |
| 30 | ; SSE42-NEXT: pcmpeqq %xmm1, %xmm0 |
| 31 | ; SSE42-NEXT: retq |
| 32 | ; |
| 33 | ; AVX-LABEL: eq_v2i64: |
| 34 | ; AVX: # BB#0: |
| 35 | ; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 |
| 36 | ; AVX-NEXT: retq |
| 37 | ; |
| 38 | ; XOP-LABEL: eq_v2i64: |
| 39 | ; XOP: # BB#0: |
| 40 | ; XOP-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 |
| 41 | ; XOP-NEXT: retq |
| 42 | %1 = icmp eq <2 x i64> %a, %b |
| 43 | %2 = sext <2 x i1> %1 to <2 x i64> |
| 44 | ret <2 x i64> %2 |
| 45 | } |
| 46 | |
| 47 | define <4 x i32> @eq_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { |
| 48 | ; SSE-LABEL: eq_v4i32: |
| 49 | ; SSE: # BB#0: |
| 50 | ; SSE-NEXT: pcmpeqd %xmm1, %xmm0 |
| 51 | ; SSE-NEXT: retq |
| 52 | ; |
| 53 | ; AVX-LABEL: eq_v4i32: |
| 54 | ; AVX: # BB#0: |
| 55 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 56 | ; AVX-NEXT: retq |
| 57 | ; |
| 58 | ; XOP-LABEL: eq_v4i32: |
| 59 | ; XOP: # BB#0: |
| 60 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 61 | ; XOP-NEXT: retq |
| 62 | %1 = icmp eq <4 x i32> %a, %b |
| 63 | %2 = sext <4 x i1> %1 to <4 x i32> |
| 64 | ret <4 x i32> %2 |
| 65 | } |
| 66 | |
| 67 | define <8 x i16> @eq_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { |
| 68 | ; SSE-LABEL: eq_v8i16: |
| 69 | ; SSE: # BB#0: |
| 70 | ; SSE-NEXT: pcmpeqw %xmm1, %xmm0 |
| 71 | ; SSE-NEXT: retq |
| 72 | ; |
| 73 | ; AVX-LABEL: eq_v8i16: |
| 74 | ; AVX: # BB#0: |
| 75 | ; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 76 | ; AVX-NEXT: retq |
| 77 | ; |
| 78 | ; XOP-LABEL: eq_v8i16: |
| 79 | ; XOP: # BB#0: |
| 80 | ; XOP-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 81 | ; XOP-NEXT: retq |
| 82 | %1 = icmp eq <8 x i16> %a, %b |
| 83 | %2 = sext <8 x i1> %1 to <8 x i16> |
| 84 | ret <8 x i16> %2 |
| 85 | } |
| 86 | |
| 87 | define <16 x i8> @eq_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { |
| 88 | ; SSE-LABEL: eq_v16i8: |
| 89 | ; SSE: # BB#0: |
| 90 | ; SSE-NEXT: pcmpeqb %xmm1, %xmm0 |
| 91 | ; SSE-NEXT: retq |
| 92 | ; |
| 93 | ; AVX-LABEL: eq_v16i8: |
| 94 | ; AVX: # BB#0: |
| 95 | ; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 96 | ; AVX-NEXT: retq |
| 97 | ; |
| 98 | ; XOP-LABEL: eq_v16i8: |
| 99 | ; XOP: # BB#0: |
| 100 | ; XOP-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 101 | ; XOP-NEXT: retq |
| 102 | %1 = icmp eq <16 x i8> %a, %b |
| 103 | %2 = sext <16 x i1> %1 to <16 x i8> |
| 104 | ret <16 x i8> %2 |
| 105 | } |
| 106 | |
| 107 | ; |
| 108 | ; Not Equal |
| 109 | ; |
| 110 | |
| 111 | define <2 x i64> @ne_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { |
| 112 | ; SSE2-LABEL: ne_v2i64: |
| 113 | ; SSE2: # BB#0: |
| 114 | ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 |
| 115 | ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2] |
| 116 | ; SSE2-NEXT: pand %xmm1, %xmm0 |
| 117 | ; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 |
| 118 | ; SSE2-NEXT: pxor %xmm1, %xmm0 |
| 119 | ; SSE2-NEXT: retq |
| 120 | ; |
| 121 | ; SSE41-LABEL: ne_v2i64: |
| 122 | ; SSE41: # BB#0: |
| 123 | ; SSE41-NEXT: pcmpeqq %xmm1, %xmm0 |
| 124 | ; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 |
| 125 | ; SSE41-NEXT: pxor %xmm1, %xmm0 |
| 126 | ; SSE41-NEXT: retq |
| 127 | ; |
| 128 | ; SSE42-LABEL: ne_v2i64: |
| 129 | ; SSE42: # BB#0: |
| 130 | ; SSE42-NEXT: pcmpeqq %xmm1, %xmm0 |
| 131 | ; SSE42-NEXT: pcmpeqd %xmm1, %xmm1 |
| 132 | ; SSE42-NEXT: pxor %xmm1, %xmm0 |
| 133 | ; SSE42-NEXT: retq |
| 134 | ; |
| 135 | ; AVX-LABEL: ne_v2i64: |
| 136 | ; AVX: # BB#0: |
| 137 | ; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 |
| 138 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 139 | ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 140 | ; AVX-NEXT: retq |
| 141 | ; |
| 142 | ; XOP-LABEL: ne_v2i64: |
| 143 | ; XOP: # BB#0: |
| 144 | ; XOP-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 |
| 145 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 146 | ; XOP-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 147 | ; XOP-NEXT: retq |
| 148 | %1 = icmp ne <2 x i64> %a, %b |
| 149 | %2 = sext <2 x i1> %1 to <2 x i64> |
| 150 | ret <2 x i64> %2 |
| 151 | } |
| 152 | |
| 153 | define <4 x i32> @ne_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { |
| 154 | ; SSE-LABEL: ne_v4i32: |
| 155 | ; SSE: # BB#0: |
| 156 | ; SSE-NEXT: pcmpeqd %xmm1, %xmm0 |
| 157 | ; SSE-NEXT: pcmpeqd %xmm1, %xmm1 |
| 158 | ; SSE-NEXT: pxor %xmm1, %xmm0 |
| 159 | ; SSE-NEXT: retq |
| 160 | ; |
| 161 | ; AVX-LABEL: ne_v4i32: |
| 162 | ; AVX: # BB#0: |
| 163 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 164 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 165 | ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 166 | ; AVX-NEXT: retq |
| 167 | ; |
| 168 | ; XOP-LABEL: ne_v4i32: |
| 169 | ; XOP: # BB#0: |
| 170 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 171 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 172 | ; XOP-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 173 | ; XOP-NEXT: retq |
| 174 | %1 = icmp ne <4 x i32> %a, %b |
| 175 | %2 = sext <4 x i1> %1 to <4 x i32> |
| 176 | ret <4 x i32> %2 |
| 177 | } |
| 178 | |
| 179 | define <8 x i16> @ne_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { |
| 180 | ; SSE-LABEL: ne_v8i16: |
| 181 | ; SSE: # BB#0: |
| 182 | ; SSE-NEXT: pcmpeqw %xmm1, %xmm0 |
| 183 | ; SSE-NEXT: pcmpeqd %xmm1, %xmm1 |
| 184 | ; SSE-NEXT: pxor %xmm1, %xmm0 |
| 185 | ; SSE-NEXT: retq |
| 186 | ; |
| 187 | ; AVX-LABEL: ne_v8i16: |
| 188 | ; AVX: # BB#0: |
| 189 | ; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 190 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 191 | ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 192 | ; AVX-NEXT: retq |
| 193 | ; |
| 194 | ; XOP-LABEL: ne_v8i16: |
| 195 | ; XOP: # BB#0: |
| 196 | ; XOP-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 197 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 198 | ; XOP-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 199 | ; XOP-NEXT: retq |
| 200 | %1 = icmp ne <8 x i16> %a, %b |
| 201 | %2 = sext <8 x i1> %1 to <8 x i16> |
| 202 | ret <8 x i16> %2 |
| 203 | } |
| 204 | |
| 205 | define <16 x i8> @ne_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { |
| 206 | ; SSE-LABEL: ne_v16i8: |
| 207 | ; SSE: # BB#0: |
| 208 | ; SSE-NEXT: pcmpeqb %xmm1, %xmm0 |
| 209 | ; SSE-NEXT: pcmpeqd %xmm1, %xmm1 |
| 210 | ; SSE-NEXT: pxor %xmm1, %xmm0 |
| 211 | ; SSE-NEXT: retq |
| 212 | ; |
| 213 | ; AVX-LABEL: ne_v16i8: |
| 214 | ; AVX: # BB#0: |
| 215 | ; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 216 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 217 | ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 218 | ; AVX-NEXT: retq |
| 219 | ; |
| 220 | ; XOP-LABEL: ne_v16i8: |
| 221 | ; XOP: # BB#0: |
| 222 | ; XOP-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 223 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 224 | ; XOP-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 225 | ; XOP-NEXT: retq |
| 226 | %1 = icmp ne <16 x i8> %a, %b |
| 227 | %2 = sext <16 x i1> %1 to <16 x i8> |
| 228 | ret <16 x i8> %2 |
| 229 | } |
| 230 | |
| 231 | ; |
| 232 | ; Greater Than Or Equal |
| 233 | ; |
| 234 | |
| 235 | define <2 x i64> @ge_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { |
| 236 | ; SSE2-LABEL: ge_v2i64: |
| 237 | ; SSE2: # BB#0: |
| 238 | ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 239 | ; SSE2-NEXT: pxor %xmm2, %xmm0 |
| 240 | ; SSE2-NEXT: pxor %xmm2, %xmm1 |
| 241 | ; SSE2-NEXT: movdqa %xmm1, %xmm2 |
| 242 | ; SSE2-NEXT: pcmpgtd %xmm0, %xmm2 |
| 243 | ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 244 | ; SSE2-NEXT: pcmpeqd %xmm0, %xmm1 |
| 245 | ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] |
| 246 | ; SSE2-NEXT: pand %xmm3, %xmm0 |
| 247 | ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] |
| 248 | ; SSE2-NEXT: por %xmm0, %xmm1 |
| 249 | ; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 |
| 250 | ; SSE2-NEXT: pxor %xmm1, %xmm0 |
| 251 | ; SSE2-NEXT: retq |
| 252 | ; |
| 253 | ; SSE41-LABEL: ge_v2i64: |
| 254 | ; SSE41: # BB#0: |
| 255 | ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 256 | ; SSE41-NEXT: pxor %xmm2, %xmm0 |
| 257 | ; SSE41-NEXT: pxor %xmm2, %xmm1 |
| 258 | ; SSE41-NEXT: movdqa %xmm1, %xmm2 |
| 259 | ; SSE41-NEXT: pcmpgtd %xmm0, %xmm2 |
| 260 | ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 261 | ; SSE41-NEXT: pcmpeqd %xmm0, %xmm1 |
| 262 | ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] |
| 263 | ; SSE41-NEXT: pand %xmm3, %xmm0 |
| 264 | ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] |
| 265 | ; SSE41-NEXT: por %xmm0, %xmm1 |
| 266 | ; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 |
| 267 | ; SSE41-NEXT: pxor %xmm1, %xmm0 |
| 268 | ; SSE41-NEXT: retq |
| 269 | ; |
| 270 | ; SSE42-LABEL: ge_v2i64: |
| 271 | ; SSE42: # BB#0: |
| 272 | ; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 273 | ; SSE42-NEXT: pxor %xmm2, %xmm0 |
| 274 | ; SSE42-NEXT: pxor %xmm1, %xmm2 |
| 275 | ; SSE42-NEXT: pcmpgtq %xmm0, %xmm2 |
| 276 | ; SSE42-NEXT: pcmpeqd %xmm0, %xmm0 |
| 277 | ; SSE42-NEXT: pxor %xmm2, %xmm0 |
| 278 | ; SSE42-NEXT: retq |
| 279 | ; |
| 280 | ; AVX-LABEL: ge_v2i64: |
| 281 | ; AVX: # BB#0: |
| 282 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 283 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 284 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 285 | ; AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0 |
| 286 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 287 | ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 288 | ; AVX-NEXT: retq |
| 289 | ; |
| 290 | ; XOP-LABEL: ge_v2i64: |
| 291 | ; XOP: # BB#0: |
| 292 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 293 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 294 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 295 | ; XOP-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0 |
| 296 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 297 | ; XOP-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 298 | ; XOP-NEXT: retq |
| 299 | %1 = icmp uge <2 x i64> %a, %b |
| 300 | %2 = sext <2 x i1> %1 to <2 x i64> |
| 301 | ret <2 x i64> %2 |
| 302 | } |
| 303 | |
| 304 | define <4 x i32> @ge_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { |
| 305 | ; SSE2-LABEL: ge_v4i32: |
| 306 | ; SSE2: # BB#0: |
| 307 | ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 308 | ; SSE2-NEXT: pxor %xmm2, %xmm0 |
| 309 | ; SSE2-NEXT: pxor %xmm1, %xmm2 |
| 310 | ; SSE2-NEXT: pcmpgtd %xmm0, %xmm2 |
| 311 | ; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 |
| 312 | ; SSE2-NEXT: pxor %xmm2, %xmm0 |
| 313 | ; SSE2-NEXT: retq |
| 314 | ; |
| 315 | ; SSE41-LABEL: ge_v4i32: |
| 316 | ; SSE41: # BB#0: |
| 317 | ; SSE41-NEXT: pmaxud %xmm0, %xmm1 |
| 318 | ; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 |
| 319 | ; SSE41-NEXT: retq |
| 320 | ; |
| 321 | ; SSE42-LABEL: ge_v4i32: |
| 322 | ; SSE42: # BB#0: |
| 323 | ; SSE42-NEXT: pmaxud %xmm0, %xmm1 |
| 324 | ; SSE42-NEXT: pcmpeqd %xmm1, %xmm0 |
| 325 | ; SSE42-NEXT: retq |
| 326 | ; |
| 327 | ; AVX-LABEL: ge_v4i32: |
| 328 | ; AVX: # BB#0: |
| 329 | ; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm1 |
| 330 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 331 | ; AVX-NEXT: retq |
| 332 | ; |
| 333 | ; XOP-LABEL: ge_v4i32: |
| 334 | ; XOP: # BB#0: |
| 335 | ; XOP-NEXT: vpmaxud %xmm1, %xmm0, %xmm1 |
| 336 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 337 | ; XOP-NEXT: retq |
| 338 | %1 = icmp uge <4 x i32> %a, %b |
| 339 | %2 = sext <4 x i1> %1 to <4 x i32> |
| 340 | ret <4 x i32> %2 |
| 341 | } |
| 342 | |
| 343 | define <8 x i16> @ge_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { |
| 344 | ; SSE2-LABEL: ge_v8i16: |
| 345 | ; SSE2: # BB#0: |
| 346 | ; SSE2-NEXT: psubusw %xmm0, %xmm1 |
| 347 | ; SSE2-NEXT: pxor %xmm0, %xmm0 |
| 348 | ; SSE2-NEXT: pcmpeqw %xmm1, %xmm0 |
| 349 | ; SSE2-NEXT: retq |
| 350 | ; |
| 351 | ; SSE41-LABEL: ge_v8i16: |
| 352 | ; SSE41: # BB#0: |
| 353 | ; SSE41-NEXT: pmaxuw %xmm0, %xmm1 |
| 354 | ; SSE41-NEXT: pcmpeqw %xmm1, %xmm0 |
| 355 | ; SSE41-NEXT: retq |
| 356 | ; |
| 357 | ; SSE42-LABEL: ge_v8i16: |
| 358 | ; SSE42: # BB#0: |
| 359 | ; SSE42-NEXT: pmaxuw %xmm0, %xmm1 |
| 360 | ; SSE42-NEXT: pcmpeqw %xmm1, %xmm0 |
| 361 | ; SSE42-NEXT: retq |
| 362 | ; |
| 363 | ; AVX-LABEL: ge_v8i16: |
| 364 | ; AVX: # BB#0: |
| 365 | ; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm1 |
| 366 | ; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 367 | ; AVX-NEXT: retq |
| 368 | ; |
| 369 | ; XOP-LABEL: ge_v8i16: |
| 370 | ; XOP: # BB#0: |
| 371 | ; XOP-NEXT: vpmaxuw %xmm1, %xmm0, %xmm1 |
| 372 | ; XOP-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 373 | ; XOP-NEXT: retq |
| 374 | %1 = icmp uge <8 x i16> %a, %b |
| 375 | %2 = sext <8 x i1> %1 to <8 x i16> |
| 376 | ret <8 x i16> %2 |
| 377 | } |
| 378 | |
| 379 | define <16 x i8> @ge_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { |
| 380 | ; SSE-LABEL: ge_v16i8: |
| 381 | ; SSE: # BB#0: |
| 382 | ; SSE-NEXT: pmaxub %xmm0, %xmm1 |
| 383 | ; SSE-NEXT: pcmpeqb %xmm1, %xmm0 |
| 384 | ; SSE-NEXT: retq |
| 385 | ; |
| 386 | ; AVX-LABEL: ge_v16i8: |
| 387 | ; AVX: # BB#0: |
| 388 | ; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm1 |
| 389 | ; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 390 | ; AVX-NEXT: retq |
| 391 | ; |
| 392 | ; XOP-LABEL: ge_v16i8: |
| 393 | ; XOP: # BB#0: |
| 394 | ; XOP-NEXT: vpmaxub %xmm1, %xmm0, %xmm1 |
| 395 | ; XOP-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 396 | ; XOP-NEXT: retq |
| 397 | %1 = icmp uge <16 x i8> %a, %b |
| 398 | %2 = sext <16 x i1> %1 to <16 x i8> |
| 399 | ret <16 x i8> %2 |
| 400 | } |
| 401 | |
| 402 | ; |
| 403 | ; Greater Than |
| 404 | ; |
| 405 | |
| 406 | define <2 x i64> @gt_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { |
| 407 | ; SSE2-LABEL: gt_v2i64: |
| 408 | ; SSE2: # BB#0: |
| 409 | ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 410 | ; SSE2-NEXT: pxor %xmm2, %xmm1 |
| 411 | ; SSE2-NEXT: pxor %xmm2, %xmm0 |
| 412 | ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| 413 | ; SSE2-NEXT: pcmpgtd %xmm1, %xmm2 |
| 414 | ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 415 | ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 |
| 416 | ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| 417 | ; SSE2-NEXT: pand %xmm3, %xmm1 |
| 418 | ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] |
| 419 | ; SSE2-NEXT: por %xmm1, %xmm0 |
| 420 | ; SSE2-NEXT: retq |
| 421 | ; |
| 422 | ; SSE41-LABEL: gt_v2i64: |
| 423 | ; SSE41: # BB#0: |
| 424 | ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 425 | ; SSE41-NEXT: pxor %xmm2, %xmm1 |
| 426 | ; SSE41-NEXT: pxor %xmm2, %xmm0 |
| 427 | ; SSE41-NEXT: movdqa %xmm0, %xmm2 |
| 428 | ; SSE41-NEXT: pcmpgtd %xmm1, %xmm2 |
| 429 | ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 430 | ; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 |
| 431 | ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| 432 | ; SSE41-NEXT: pand %xmm3, %xmm1 |
| 433 | ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] |
| 434 | ; SSE41-NEXT: por %xmm1, %xmm0 |
| 435 | ; SSE41-NEXT: retq |
| 436 | ; |
| 437 | ; SSE42-LABEL: gt_v2i64: |
| 438 | ; SSE42: # BB#0: |
| 439 | ; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 440 | ; SSE42-NEXT: pxor %xmm2, %xmm1 |
| 441 | ; SSE42-NEXT: pxor %xmm2, %xmm0 |
| 442 | ; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 |
| 443 | ; SSE42-NEXT: retq |
| 444 | ; |
| 445 | ; AVX-LABEL: gt_v2i64: |
| 446 | ; AVX: # BB#0: |
| 447 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 448 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 449 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 450 | ; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 |
| 451 | ; AVX-NEXT: retq |
| 452 | ; |
| 453 | ; XOP-LABEL: gt_v2i64: |
| 454 | ; XOP: # BB#0: |
| 455 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 456 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 457 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 458 | ; XOP-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 |
| 459 | ; XOP-NEXT: retq |
| 460 | %1 = icmp ugt <2 x i64> %a, %b |
| 461 | %2 = sext <2 x i1> %1 to <2 x i64> |
| 462 | ret <2 x i64> %2 |
| 463 | } |
| 464 | |
| 465 | define <4 x i32> @gt_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { |
| 466 | ; SSE-LABEL: gt_v4i32: |
| 467 | ; SSE: # BB#0: |
| 468 | ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 469 | ; SSE-NEXT: pxor %xmm2, %xmm1 |
| 470 | ; SSE-NEXT: pxor %xmm2, %xmm0 |
| 471 | ; SSE-NEXT: pcmpgtd %xmm1, %xmm0 |
| 472 | ; SSE-NEXT: retq |
| 473 | ; |
| 474 | ; AVX1-LABEL: gt_v4i32: |
| 475 | ; AVX1: # BB#0: |
| 476 | ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 477 | ; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 478 | ; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 479 | ; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 |
| 480 | ; AVX1-NEXT: retq |
| 481 | ; |
| 482 | ; AVX2-LABEL: gt_v4i32: |
| 483 | ; AVX2: # BB#0: |
| 484 | ; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 |
| 485 | ; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 486 | ; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 487 | ; AVX2-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 |
| 488 | ; AVX2-NEXT: retq |
| 489 | ; |
| 490 | ; XOPAVX1-LABEL: gt_v4i32: |
| 491 | ; XOPAVX1: # BB#0: |
| 492 | ; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 493 | ; XOPAVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 494 | ; XOPAVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 495 | ; XOPAVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 |
| 496 | ; XOPAVX1-NEXT: retq |
| 497 | ; |
| 498 | ; XOPAVX2-LABEL: gt_v4i32: |
| 499 | ; XOPAVX2: # BB#0: |
| 500 | ; XOPAVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 |
| 501 | ; XOPAVX2-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 502 | ; XOPAVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 503 | ; XOPAVX2-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 |
| 504 | ; XOPAVX2-NEXT: retq |
| 505 | ; |
| 506 | ; AVX512-LABEL: gt_v4i32: |
| 507 | ; AVX512: # BB#0: |
| 508 | ; AVX512-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 |
| 509 | ; AVX512-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 510 | ; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 511 | ; AVX512-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 |
| 512 | ; AVX512-NEXT: retq |
| 513 | %1 = icmp ugt <4 x i32> %a, %b |
| 514 | %2 = sext <4 x i1> %1 to <4 x i32> |
| 515 | ret <4 x i32> %2 |
| 516 | } |
| 517 | |
| 518 | define <8 x i16> @gt_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { |
| 519 | ; SSE-LABEL: gt_v8i16: |
| 520 | ; SSE: # BB#0: |
| 521 | ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] |
| 522 | ; SSE-NEXT: pxor %xmm2, %xmm1 |
| 523 | ; SSE-NEXT: pxor %xmm2, %xmm0 |
| 524 | ; SSE-NEXT: pcmpgtw %xmm1, %xmm0 |
| 525 | ; SSE-NEXT: retq |
| 526 | ; |
| 527 | ; AVX-LABEL: gt_v8i16: |
| 528 | ; AVX: # BB#0: |
| 529 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] |
| 530 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 531 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 532 | ; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 |
| 533 | ; AVX-NEXT: retq |
| 534 | ; |
| 535 | ; XOP-LABEL: gt_v8i16: |
| 536 | ; XOP: # BB#0: |
| 537 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] |
| 538 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 539 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 540 | ; XOP-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 |
| 541 | ; XOP-NEXT: retq |
| 542 | %1 = icmp ugt <8 x i16> %a, %b |
| 543 | %2 = sext <8 x i1> %1 to <8 x i16> |
| 544 | ret <8 x i16> %2 |
| 545 | } |
| 546 | |
| 547 | define <16 x i8> @gt_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { |
| 548 | ; SSE-LABEL: gt_v16i8: |
| 549 | ; SSE: # BB#0: |
| 550 | ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128] |
| 551 | ; SSE-NEXT: pxor %xmm2, %xmm1 |
| 552 | ; SSE-NEXT: pxor %xmm2, %xmm0 |
| 553 | ; SSE-NEXT: pcmpgtb %xmm1, %xmm0 |
| 554 | ; SSE-NEXT: retq |
| 555 | ; |
| 556 | ; AVX-LABEL: gt_v16i8: |
| 557 | ; AVX: # BB#0: |
| 558 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128] |
| 559 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 560 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 561 | ; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 |
| 562 | ; AVX-NEXT: retq |
| 563 | ; |
| 564 | ; XOP-LABEL: gt_v16i8: |
| 565 | ; XOP: # BB#0: |
| 566 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128] |
| 567 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 568 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 569 | ; XOP-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 |
| 570 | ; XOP-NEXT: retq |
| 571 | %1 = icmp ugt <16 x i8> %a, %b |
| 572 | %2 = sext <16 x i1> %1 to <16 x i8> |
| 573 | ret <16 x i8> %2 |
| 574 | } |
| 575 | |
| 576 | ; |
| 577 | ; Less Than Or Equal |
| 578 | ; |
| 579 | |
| 580 | define <2 x i64> @le_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { |
| 581 | ; SSE2-LABEL: le_v2i64: |
| 582 | ; SSE2: # BB#0: |
| 583 | ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 584 | ; SSE2-NEXT: pxor %xmm2, %xmm1 |
| 585 | ; SSE2-NEXT: pxor %xmm2, %xmm0 |
| 586 | ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| 587 | ; SSE2-NEXT: pcmpgtd %xmm1, %xmm2 |
| 588 | ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 589 | ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 |
| 590 | ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] |
| 591 | ; SSE2-NEXT: pand %xmm3, %xmm0 |
| 592 | ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] |
| 593 | ; SSE2-NEXT: por %xmm0, %xmm1 |
| 594 | ; SSE2-NEXT: pcmpeqd %xmm0, %xmm0 |
| 595 | ; SSE2-NEXT: pxor %xmm1, %xmm0 |
| 596 | ; SSE2-NEXT: retq |
| 597 | ; |
| 598 | ; SSE41-LABEL: le_v2i64: |
| 599 | ; SSE41: # BB#0: |
| 600 | ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 601 | ; SSE41-NEXT: pxor %xmm2, %xmm1 |
| 602 | ; SSE41-NEXT: pxor %xmm2, %xmm0 |
| 603 | ; SSE41-NEXT: movdqa %xmm0, %xmm2 |
| 604 | ; SSE41-NEXT: pcmpgtd %xmm1, %xmm2 |
| 605 | ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 606 | ; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 |
| 607 | ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] |
| 608 | ; SSE41-NEXT: pand %xmm3, %xmm0 |
| 609 | ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] |
| 610 | ; SSE41-NEXT: por %xmm0, %xmm1 |
| 611 | ; SSE41-NEXT: pcmpeqd %xmm0, %xmm0 |
| 612 | ; SSE41-NEXT: pxor %xmm1, %xmm0 |
| 613 | ; SSE41-NEXT: retq |
| 614 | ; |
| 615 | ; SSE42-LABEL: le_v2i64: |
| 616 | ; SSE42: # BB#0: |
| 617 | ; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 618 | ; SSE42-NEXT: pxor %xmm2, %xmm1 |
| 619 | ; SSE42-NEXT: pxor %xmm2, %xmm0 |
| 620 | ; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 |
| 621 | ; SSE42-NEXT: pcmpeqd %xmm1, %xmm1 |
| 622 | ; SSE42-NEXT: pxor %xmm1, %xmm0 |
| 623 | ; SSE42-NEXT: retq |
| 624 | ; |
| 625 | ; AVX-LABEL: le_v2i64: |
| 626 | ; AVX: # BB#0: |
| 627 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 628 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 629 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 630 | ; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 |
| 631 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 632 | ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 633 | ; AVX-NEXT: retq |
| 634 | ; |
| 635 | ; XOP-LABEL: le_v2i64: |
| 636 | ; XOP: # BB#0: |
| 637 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 638 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 639 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 640 | ; XOP-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 |
| 641 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 |
| 642 | ; XOP-NEXT: vpxor %xmm1, %xmm0, %xmm0 |
| 643 | ; XOP-NEXT: retq |
| 644 | %1 = icmp ule <2 x i64> %a, %b |
| 645 | %2 = sext <2 x i1> %1 to <2 x i64> |
| 646 | ret <2 x i64> %2 |
| 647 | } |
| 648 | |
| 649 | define <4 x i32> @le_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { |
| 650 | ; SSE2-LABEL: le_v4i32: |
| 651 | ; SSE2: # BB#0: |
| 652 | ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 653 | ; SSE2-NEXT: pxor %xmm2, %xmm1 |
| 654 | ; SSE2-NEXT: pxor %xmm2, %xmm0 |
| 655 | ; SSE2-NEXT: pcmpgtd %xmm1, %xmm0 |
| 656 | ; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 |
| 657 | ; SSE2-NEXT: pxor %xmm1, %xmm0 |
| 658 | ; SSE2-NEXT: retq |
| 659 | ; |
| 660 | ; SSE41-LABEL: le_v4i32: |
| 661 | ; SSE41: # BB#0: |
| 662 | ; SSE41-NEXT: pminud %xmm0, %xmm1 |
| 663 | ; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 |
| 664 | ; SSE41-NEXT: retq |
| 665 | ; |
| 666 | ; SSE42-LABEL: le_v4i32: |
| 667 | ; SSE42: # BB#0: |
| 668 | ; SSE42-NEXT: pminud %xmm0, %xmm1 |
| 669 | ; SSE42-NEXT: pcmpeqd %xmm1, %xmm0 |
| 670 | ; SSE42-NEXT: retq |
| 671 | ; |
| 672 | ; AVX-LABEL: le_v4i32: |
| 673 | ; AVX: # BB#0: |
| 674 | ; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm1 |
| 675 | ; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 676 | ; AVX-NEXT: retq |
| 677 | ; |
| 678 | ; XOP-LABEL: le_v4i32: |
| 679 | ; XOP: # BB#0: |
| 680 | ; XOP-NEXT: vpminud %xmm1, %xmm0, %xmm1 |
| 681 | ; XOP-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 |
| 682 | ; XOP-NEXT: retq |
| 683 | %1 = icmp ule <4 x i32> %a, %b |
| 684 | %2 = sext <4 x i1> %1 to <4 x i32> |
| 685 | ret <4 x i32> %2 |
| 686 | } |
| 687 | |
| 688 | define <8 x i16> @le_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { |
| 689 | ; SSE2-LABEL: le_v8i16: |
| 690 | ; SSE2: # BB#0: |
| 691 | ; SSE2-NEXT: psubusw %xmm1, %xmm0 |
| 692 | ; SSE2-NEXT: pxor %xmm1, %xmm1 |
| 693 | ; SSE2-NEXT: pcmpeqw %xmm1, %xmm0 |
| 694 | ; SSE2-NEXT: retq |
| 695 | ; |
| 696 | ; SSE41-LABEL: le_v8i16: |
| 697 | ; SSE41: # BB#0: |
| 698 | ; SSE41-NEXT: pminuw %xmm0, %xmm1 |
| 699 | ; SSE41-NEXT: pcmpeqw %xmm1, %xmm0 |
| 700 | ; SSE41-NEXT: retq |
| 701 | ; |
| 702 | ; SSE42-LABEL: le_v8i16: |
| 703 | ; SSE42: # BB#0: |
| 704 | ; SSE42-NEXT: pminuw %xmm0, %xmm1 |
| 705 | ; SSE42-NEXT: pcmpeqw %xmm1, %xmm0 |
| 706 | ; SSE42-NEXT: retq |
| 707 | ; |
| 708 | ; AVX-LABEL: le_v8i16: |
| 709 | ; AVX: # BB#0: |
| 710 | ; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm1 |
| 711 | ; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 712 | ; AVX-NEXT: retq |
| 713 | ; |
| 714 | ; XOP-LABEL: le_v8i16: |
| 715 | ; XOP: # BB#0: |
| 716 | ; XOP-NEXT: vpminuw %xmm1, %xmm0, %xmm1 |
| 717 | ; XOP-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 |
| 718 | ; XOP-NEXT: retq |
| 719 | %1 = icmp ule <8 x i16> %a, %b |
| 720 | %2 = sext <8 x i1> %1 to <8 x i16> |
| 721 | ret <8 x i16> %2 |
| 722 | } |
| 723 | |
| 724 | define <16 x i8> @le_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { |
| 725 | ; SSE-LABEL: le_v16i8: |
| 726 | ; SSE: # BB#0: |
| 727 | ; SSE-NEXT: pminub %xmm0, %xmm1 |
| 728 | ; SSE-NEXT: pcmpeqb %xmm1, %xmm0 |
| 729 | ; SSE-NEXT: retq |
| 730 | ; |
| 731 | ; AVX-LABEL: le_v16i8: |
| 732 | ; AVX: # BB#0: |
| 733 | ; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm1 |
| 734 | ; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 735 | ; AVX-NEXT: retq |
| 736 | ; |
| 737 | ; XOP-LABEL: le_v16i8: |
| 738 | ; XOP: # BB#0: |
| 739 | ; XOP-NEXT: vpminub %xmm1, %xmm0, %xmm1 |
| 740 | ; XOP-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 |
| 741 | ; XOP-NEXT: retq |
| 742 | %1 = icmp ule <16 x i8> %a, %b |
| 743 | %2 = sext <16 x i1> %1 to <16 x i8> |
| 744 | ret <16 x i8> %2 |
| 745 | } |
| 746 | |
| 747 | ; |
| 748 | ; Less Than |
| 749 | ; |
| 750 | |
| 751 | define <2 x i64> @lt_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { |
| 752 | ; SSE2-LABEL: lt_v2i64: |
| 753 | ; SSE2: # BB#0: |
| 754 | ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 755 | ; SSE2-NEXT: pxor %xmm2, %xmm0 |
| 756 | ; SSE2-NEXT: pxor %xmm2, %xmm1 |
| 757 | ; SSE2-NEXT: movdqa %xmm1, %xmm2 |
| 758 | ; SSE2-NEXT: pcmpgtd %xmm0, %xmm2 |
| 759 | ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 760 | ; SSE2-NEXT: pcmpeqd %xmm0, %xmm1 |
| 761 | ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] |
| 762 | ; SSE2-NEXT: pand %xmm3, %xmm1 |
| 763 | ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] |
| 764 | ; SSE2-NEXT: por %xmm1, %xmm0 |
| 765 | ; SSE2-NEXT: retq |
| 766 | ; |
| 767 | ; SSE41-LABEL: lt_v2i64: |
| 768 | ; SSE41: # BB#0: |
| 769 | ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 770 | ; SSE41-NEXT: pxor %xmm2, %xmm0 |
| 771 | ; SSE41-NEXT: pxor %xmm2, %xmm1 |
| 772 | ; SSE41-NEXT: movdqa %xmm1, %xmm2 |
| 773 | ; SSE41-NEXT: pcmpgtd %xmm0, %xmm2 |
| 774 | ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] |
| 775 | ; SSE41-NEXT: pcmpeqd %xmm0, %xmm1 |
| 776 | ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] |
| 777 | ; SSE41-NEXT: pand %xmm3, %xmm1 |
| 778 | ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] |
| 779 | ; SSE41-NEXT: por %xmm1, %xmm0 |
| 780 | ; SSE41-NEXT: retq |
| 781 | ; |
| 782 | ; SSE42-LABEL: lt_v2i64: |
| 783 | ; SSE42: # BB#0: |
| 784 | ; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 785 | ; SSE42-NEXT: pxor %xmm2, %xmm0 |
| 786 | ; SSE42-NEXT: pxor %xmm1, %xmm2 |
| 787 | ; SSE42-NEXT: pcmpgtq %xmm0, %xmm2 |
| 788 | ; SSE42-NEXT: movdqa %xmm2, %xmm0 |
| 789 | ; SSE42-NEXT: retq |
| 790 | ; |
| 791 | ; AVX-LABEL: lt_v2i64: |
| 792 | ; AVX: # BB#0: |
| 793 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 794 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 795 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 796 | ; AVX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0 |
| 797 | ; AVX-NEXT: retq |
| 798 | ; |
| 799 | ; XOP-LABEL: lt_v2i64: |
| 800 | ; XOP: # BB#0: |
| 801 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] |
| 802 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 803 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 804 | ; XOP-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0 |
| 805 | ; XOP-NEXT: retq |
| 806 | %1 = icmp ult <2 x i64> %a, %b |
| 807 | %2 = sext <2 x i1> %1 to <2 x i64> |
| 808 | ret <2 x i64> %2 |
| 809 | } |
| 810 | |
| 811 | define <4 x i32> @lt_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { |
| 812 | ; SSE-LABEL: lt_v4i32: |
| 813 | ; SSE: # BB#0: |
| 814 | ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 815 | ; SSE-NEXT: pxor %xmm2, %xmm0 |
| 816 | ; SSE-NEXT: pxor %xmm1, %xmm2 |
| 817 | ; SSE-NEXT: pcmpgtd %xmm0, %xmm2 |
| 818 | ; SSE-NEXT: movdqa %xmm2, %xmm0 |
| 819 | ; SSE-NEXT: retq |
| 820 | ; |
| 821 | ; AVX1-LABEL: lt_v4i32: |
| 822 | ; AVX1: # BB#0: |
| 823 | ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 824 | ; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 825 | ; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 826 | ; AVX1-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0 |
| 827 | ; AVX1-NEXT: retq |
| 828 | ; |
| 829 | ; AVX2-LABEL: lt_v4i32: |
| 830 | ; AVX2: # BB#0: |
| 831 | ; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 |
| 832 | ; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 833 | ; AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 834 | ; AVX2-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0 |
| 835 | ; AVX2-NEXT: retq |
| 836 | ; |
| 837 | ; XOPAVX1-LABEL: lt_v4i32: |
| 838 | ; XOPAVX1: # BB#0: |
| 839 | ; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] |
| 840 | ; XOPAVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 841 | ; XOPAVX1-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 842 | ; XOPAVX1-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0 |
| 843 | ; XOPAVX1-NEXT: retq |
| 844 | ; |
| 845 | ; XOPAVX2-LABEL: lt_v4i32: |
| 846 | ; XOPAVX2: # BB#0: |
| 847 | ; XOPAVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 |
| 848 | ; XOPAVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 849 | ; XOPAVX2-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 850 | ; XOPAVX2-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0 |
| 851 | ; XOPAVX2-NEXT: retq |
| 852 | ; |
| 853 | ; AVX512-LABEL: lt_v4i32: |
| 854 | ; AVX512: # BB#0: |
| 855 | ; AVX512-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 |
| 856 | ; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 857 | ; AVX512-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 858 | ; AVX512-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0 |
| 859 | ; AVX512-NEXT: retq |
| 860 | %1 = icmp ult <4 x i32> %a, %b |
| 861 | %2 = sext <4 x i1> %1 to <4 x i32> |
| 862 | ret <4 x i32> %2 |
| 863 | } |
| 864 | |
| 865 | define <8 x i16> @lt_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { |
| 866 | ; SSE-LABEL: lt_v8i16: |
| 867 | ; SSE: # BB#0: |
| 868 | ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] |
| 869 | ; SSE-NEXT: pxor %xmm2, %xmm0 |
| 870 | ; SSE-NEXT: pxor %xmm1, %xmm2 |
| 871 | ; SSE-NEXT: pcmpgtw %xmm0, %xmm2 |
| 872 | ; SSE-NEXT: movdqa %xmm2, %xmm0 |
| 873 | ; SSE-NEXT: retq |
| 874 | ; |
| 875 | ; AVX-LABEL: lt_v8i16: |
| 876 | ; AVX: # BB#0: |
| 877 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] |
| 878 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 879 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 880 | ; AVX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0 |
| 881 | ; AVX-NEXT: retq |
| 882 | ; |
| 883 | ; XOP-LABEL: lt_v8i16: |
| 884 | ; XOP: # BB#0: |
| 885 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] |
| 886 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 887 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 888 | ; XOP-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0 |
| 889 | ; XOP-NEXT: retq |
| 890 | %1 = icmp ult <8 x i16> %a, %b |
| 891 | %2 = sext <8 x i1> %1 to <8 x i16> |
| 892 | ret <8 x i16> %2 |
| 893 | } |
| 894 | |
| 895 | define <16 x i8> @lt_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { |
| 896 | ; SSE-LABEL: lt_v16i8: |
| 897 | ; SSE: # BB#0: |
| 898 | ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128] |
| 899 | ; SSE-NEXT: pxor %xmm2, %xmm0 |
| 900 | ; SSE-NEXT: pxor %xmm1, %xmm2 |
| 901 | ; SSE-NEXT: pcmpgtb %xmm0, %xmm2 |
| 902 | ; SSE-NEXT: movdqa %xmm2, %xmm0 |
| 903 | ; SSE-NEXT: retq |
| 904 | ; |
| 905 | ; AVX-LABEL: lt_v16i8: |
| 906 | ; AVX: # BB#0: |
| 907 | ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128] |
| 908 | ; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 909 | ; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 910 | ; AVX-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0 |
| 911 | ; AVX-NEXT: retq |
| 912 | ; |
| 913 | ; XOP-LABEL: lt_v16i8: |
| 914 | ; XOP: # BB#0: |
| 915 | ; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128] |
| 916 | ; XOP-NEXT: vpxor %xmm2, %xmm0, %xmm0 |
| 917 | ; XOP-NEXT: vpxor %xmm2, %xmm1, %xmm1 |
| 918 | ; XOP-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0 |
| 919 | ; XOP-NEXT: retq |
| 920 | %1 = icmp ult <16 x i8> %a, %b |
| 921 | %2 = sext <16 x i1> %1 to <16 x i8> |
| 922 | ret <16 x i8> %2 |
| 923 | } |